Analog Delay Line (Echo And Reverb)

  
This circuit uses an SAD 512D (Reticon) chip, which is a 512-stage analog shift register. By varying th
Analog Delay Line (Echo And Reverb) - schematic

e clock frequency between 5 and 50 kHz, delay time can be set between 51.2 and 5.12 ms. The clock frequency must be at least twice the highest audio frequency.




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