Op amp circuit diagram relay delay release


Posted on Mar 28, 2007

As shown in FIG relay the delayed release operational amplifier circuit. When the power switch, the inverting input terminal of the operational amplifier is added resistor 4.7k


Op amp circuit diagram relay delay release
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and 10k partial pressure of VT, C1 had a chance to charge the non-inverting input is applied low. Therefore, the operational amplifier output is low and relay. And the power to charge the capacitor through resistor 1.2M C1. With the charging capacitor C1, the voltage which is gradually increased over a period of time on the Cl voltage becomes high, so the non-inverting input plus is high, the operational amplifier output is high, the relay It is released. So this circuit is a relay delay release circuit. The length of the delay time can be varied by adjusting the 1.2M resistance, such as by the parameter map, the delay time is about 260s. Load circuit may be a relay or solenoid coil may be lights and other display and alarm devices.




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