40MHz 32 Channel PC-Based Logic Analyser

  
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It is a 32 Channel, 40Mhz, fully PCcontrolled TTL/CMOSlogic analyser with internal/external triggering and trigger delay. Internal triggering is fully maskable (High/Low/Don`t Care) on all 32 channels. The whole things fits on one single sided PCB with virtually no wiring! Unfortunately the PCLA is not available as a complete kit from any of the k
40MHz 32 Channel PC-Based Logic Analyser - schematic

it suppliers, and I no longer sell the pre-programmed PLD`s. Only the software is available. So if you want to build it, then I`m afraid you`ll have to make the PCB and program the PLD`s yourself. The PLD`s were designed with the old Lattice Semiconductor ispLSI starter kit, but the newer Lattice development tools are available from the lattice web site. I have not used this new software, and email reports indicate that the files on this page are not compatible with it. I do not know how to solve this issue, so please don`t ask. I have no plans to upgrade this project to new devices or software. The internal schematics for the chips are available on this page, you can use these to program the newer devices yourself. NOTE : I get a *lot* of email about the ispLSI PLDchips in this project. For those of you who are unaware of what they are, they are Programmable Logic Devices, and they are BLANK when you buy them, you MUSTprogram them with the JED files from here in order to get them to work. If you don`t even know this much then you really have no need for this project! Peter Baxter has developed a new Logic Anlyser product that should be on the market around the end of 2003. The delay is due to Business Partner issues, rather than engineering aspects. The earlier kit version completely sold out in 1999. There are no units available and no spare parts. You can look at the website: for info on the kit, but don`t get excited by...



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