8051 Development Board

This chapter contains the description of a simple development board for the study of the 8051 family of microcontrollers Unlike the development boards dedicated to the HC11 and AVR families, presented in the previous chapters, this project allows the user to load and execute programs in an external RAM area, addressed to be visible both in the p
8051 Development Board - schematic

rogram memory and data memory address space. The schematic of the board is presented in Fig. 11. 1, 11. 2, and 11. 3. Figure 11. 1 shows the microcontroller IC10, the bus demultiplexer IC7, the RS232 interface IC12, the RESET and clock circuits, and the ISP connector SV1. Note the presence of the two NAND gates IC6C and IC6D, which implement the logic function AND between the signals RD (Read) and PSEN (Program Store Enable), both active LOW, and generate the signal RDPSEN. RDPSEN is active LOW when either RD or PSEN is LOW. Connecting this signal to the RD input of an external RAM circuit allows the use of this RAM to store program as well as data. The microcontroller can be any of 8032, 8051, 8052, AT89C51, AT89C52, etc. in a DIP40 package. The input EA (External Access) of the MCU is connected to the jumper JP1 to allow the use of the internal ROM, if this is available. Connect the jumper so that EA = 1 to use the internal ROM. When the external ROM is.

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