ANALOG DELAY LINEECHO AND REVERB

  
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This circuit uses an SAD 512D (Reticon) chip, which is a 512-stage analog shift register. By varying the clock frequency between 5 and 50 kHz, delay time can be set between 51. 2 and 5. 12 ms. The clock fre-quency must be at least twice the highest audio frequency.
ANALOG DELAY LINEECHO AND REVERB - schematic




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