Creating Fast Line Transients


Posted on Feb 5, 2014

An integrated circuit`s response to fast transients on its input supply is often an important measurement to take. If the device under test (DUT) is a micro-power device and doesn`t require an input bypass capacitor, simply drive the power-supply input with a 50 © terminated function generator. However, as the current requirements and capacitance


Creating Fast Line Transients
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are increased, this no longer provides acceptable results. One solution to obtaining this fast transient into large capacitive loads is to make an open-loop buffer. Because an open-loop buffer has no feedback, it is insensitive to capacitive loads and can be designed to meet most current requirements. Important criteria for this buffer include high slew rate, high output drive, low offset voltage, low distortion, and thermal compensation. The circuit in the figure below satisfies these requirements. It is similar to the classic BJT buffer with a few modifications. Because the transistors used are not on a single monolithic die, some means has to be provided to adjust the bias. Furthermore, the circuit must have some method to keep this bias constant over temperature. The circuit consists of three major blocks. There is a high-impedance complementary input stage, followed by a VBE multiplier for bias adjustment, and then a complementary Darlington output stage. The input stage and the VBE multiplier are biased with constant current sources, whereas the output stage is biased by the output of the VBE multiplier. The key to connecting the input stage to the VBE multiplier and the output stage is the inclusion of some series resistance via resistors R7 and R8. This allows the VBE multiplier to control the output stage bias without fighting the bias levels of the input stage. This becomes a factor as the output stage heats up...




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