Frequency Counter

  
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I needed an excuse to use the soldering iron so I figured that I might as well as make a frequency counter which is something that I`ve always wanted, but lacked in my lab. Here`s the schematic. I drew it up in OrCAD PSpice a while back. Since then, I have lost the design files, but fortunately, I kept a hard copy, complete with annotations of the colour of the wire that I used for some of the confusing control logic.
Frequency Counter - schematic

In free running mode, the device simply counts the number of pulses that has come in from the input port. If the number of pulses exceeds what can be displayed (999999), then an overflow indicator will turn on, indicating this error. Pressing the reset button will reset the count and the overflow indicator. Enabling data hold will pause the display while the device continues counting; no counts will be lost when data hold is enabled. Implementation: In this mode, the latches will activate (i. e. enable memory) when the data hold switch is enabled. The control logic will not reset the counters or enable the latch memory. In other words, the time base will be ignored. In frequency counter mode, the counters will count the number of pulses over a given period of time, otherwise referred to as the integration period. The number of pulses in this period is displayed. If the integration period is 1 s, then the displayed number is the frequency of the input port in Hz. If the frequency is too high and cannot be displayed, an overflow indicator will be lit. This can be cleared by pressing the reset button. Like free running mode, the current display can be paused by flipping the data hold switch. During this time, the frequency counter is still running and the current frequency will be updated once the data hold switch is deactivated. The frequency counter can have integration periods of anywhere between 1 ms to 10 s. The fixed...



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