Frequency counter Input schematic

Posted on Feb 6, 2014

The master mode selection switch is IC6 which switches the 4 mode LEDs (which also correspond to the measured unity, i. e. kHz, counts, milli-seconds or seconds) as well as the input for the divider and the counter : For standard frequency counter mode (mode: 0, unity: kHz) as well as counter mode (mode: 1, unity: counts), the input A is used (for

Frequency counter Input schematic
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divider, etc); for both time measurement modes (mode: 2, 3; unity msec, seconds), the fixed 1MHz and 1kHz clock sources are used. This, of course, requires that there is another switch which acts as a gate to control exactly how long the output of the master mode switch is conntected to the divider and counter : This is IC9C, an AND gate whose enable input (pin10) is controlled by IC11: In counter and time measurement modes, this enable input is simply the AND (IC9A) of the measure signal from the logic board and the enable signal from the enable logic (left bottom in the sheet). For frequency counter mode, this enable logic has no use but here, the IC2A edge-triggered (D-type) flip-flop makes sure that the measurement actually starts at a HIGH-to-LOW transition of the input signal (this is the reason for the 2 inverters IC3A, B. When the measure signal from the logic board is LOW, the flip flop IC2A is reset (pin1) and hence provides similar functionality as the IC9A AND gate for the other modes. frequency counter mode, the In order to detect when measurement is finished, the "measuring done sensor" IC2B is used which triggers on the HIGH-to-LOW transition of the enable signal (IC11`s pin7). Especially note the "feedback loop" from pin9 to pin1 of IC11 which makes sure that once the measurement is finished (i. e. IC2B`s pin9 feeds HIGH into IC11`s pins 10, 12, 13), it is not re-started again before there was a reset pulse...

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