I2C communication between PICs


Posted on Feb 5, 2014

I2C is pronounced `I squared C` and stands for Inter-Integrated Circuit. This protocol was designed by Phillips Semiconductors around 1992 to allow easy communication between components on the same circuit board and can achieve transfer rates of up to 400 kbit/sec. Is is a 2 line (plus common ground) communication method for one master device to c


I2C communication between PICs
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ontrol up to 112 slave devices. While it is possible to have multiple masters on the same I2c bus, this page will only deal with a one master configuration. The two lines are named SCL and SDA where SCL is the CLock line and SDA is the DAta line. The PIC 4520 is designed to use pin 18 as SCL and pin 23 as SDA for hardware I2C. Note that pin 18 is one of the only pins not accessible on the prototyping board. An additional wire can be added as shown in the example image. It is possible to use lines accessible from the prototyping board to communicate via software I2C, but this has data rates of less than one fourth those of hardware I2C and will therefore be omitted. I2C requires the lines to be high unless the master or the slave is pulling the line down, so you will need to use pull up resistors on both the clock and data lines. The data line can only change while the clock line is low. The data line is only read when the clock line is high and therefore 1 bit can be transferred per cycle of the clock line. The master is initially sends a start bit followed by the 7-bit address of the slave it wishes to communicate with. The next bit represents whether it wishes to write(0) to or read(1) from the slave. The slave then responds with an acknowledge bit. The transmission continues according to whether the master is attempting to read to or write from the device. Below is a simple circuit diagram showing the master PIC with 2...




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