JAM (just a minute) circuit diagram

Posted on Feb 7, 2014

This jam circuit can be used in quiz contests wherein any par- ticipant who presses his button (switch) before the other contestants, gets the first chance to answer a question. The circuit given here permits up to eight contestants with each one allotted a distinct number (1 to 8). The display will show the number of the contestant pressing his b

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utton before the others. Simultaneously, a buzzer will also sound. Both, the display as well as the buzzer have to be reset manually using a common reset switch. Initially, when reset switch S9 is momentarily pressed and released, all outputs of 74LS373 (IC1) transparent latch go high since all the input data lines are returned to Vcc via resistors R1 through R8. All eight outputs of IC1 are connected to inputs of priority encoder 74LS147 (IC2) as well as 8-input NAND gate 74LS30 (IC3). The output of IC3 thus becomes logic 0 which, after inversion by NAND gate N2, is applied to latch-enable pin 11 of IC1. With all input pins of IC2 being logic 1, its BCD output is 0000, which is applied to 7-segment decoder/driver 74LS47 (IC6) after inversion by hex inverter gates inside 74LS04 (IC5). Thus, on reset the display shows 0. When any one of the push-to-on switches S1 through S8 is pressed, the corresponding output line of IC1 is latched at logic 0 level and the display indicates the number associated with the specific switch. At the same time, output pin 8 of IC3 becomes high, which causes outputs of both gates N1 and N2 to go to logic 0 state. Logic 0 output of gate N2 inhibits IC1, and thus pressing of any other switch S1 through S8 has no effect. Thus, the contestant who presses his switch first, jams the display to show only his number. In the unlikely event of simultaneous pressing (within few nano-seconds difference) of...

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