P8 CPU Documentatio Hardware

Posted on Feb 5, 2014

The datapath contains registers, an ALU, and an internal system bus. Registers are very fast memory locations that are internal to the CPU and separate from the main system memory. They can be used as `scratch pads` during calculations. The ALU is a combinational logic device that performs arithmetic and logical operations on data. The internal bus p

P8 CPU Documentatio Hardware
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ermits data exchange between the ALU and registers. The control section interprets each instruction to be executed and asserts the datapath`s control signals in the proper sequence to implement the instruction. After executing an instruction, it proceeds to the next instruction. The following requirements and constraints were placed upon the hardware. In some cases they were contradictory, and a compromise was reached that favored reduced cost and/or construction time. 1. It must, of course, meet the specifications outlined in Section 2. 5 and implement the complete instruction set described in Section 3. 7. No compromise on this point is permissible. The programmer`s model defines the architecture of a computer. t is a high-level "machine" that is visible to the programmer, but independent of the actual physical hardware. It deals with the functional behavior of the computer as seen by the programmer. It includes the number and sizes of registers, types of instructions, addressing modes, and available memory. See Section 3 for more information on many of the architectural features of the P8 CPU. The P8 CPU consists of three 8-bit registers and one 1-bit condition register. See Figure 4. 1. It is an accumulator-based design. This means that the number in the accumulator (A register) is an operand for most ALU operations. Additionally, all ALU results are placed in the A register, and overwrite its previous contents. It is...

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