Pulse Generator


Posted on Feb 4, 2014

This circuit is very useful while checking/operating counters, stepping relays, etc. It avoids the procedure of setting a switch for the required number of pulses. By pressing appropriate switches S1 to S9, one can get 1 to 9 negative-going clock pulses, respectively. Schmitt trigger NAND gate N1 of IC2, resistor R1, and capacitor C1 are wired to


Pulse Generator
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produce clock pulses. These pulses are taken out through NAND gate N3 that is controlled by decade counter CD4017 (IC1). Initially no switch from S1 to S9 is depressed and the LED is glowing. As pins 5 and 6 of NAND gate N2 are pulled up by resistor R3, its output pin 4 goes low. This disables NAND gate N3 to take its output pin 10 to high state, and no pulse is available. IC1 is a decade counter whose Q outputs normally remain low. When clock pulses are applied, its Q outputs go high successively, i. e. Q0 shifts to Q1, Q1 shifts to Q2, Q3 shifts to Q4, and so on. If any one of switches S1 through S9, say, S5 (for five pulses), is momentarily depressed, pins 5 and 6 of NAND gate N2 go low, making its output pin 4 high, which fully charges capacitor C2 via diode D. At the same time, this high output of N2 enables NAND gate N3 and clock pulses come out through pin 10. These are the required number of pulses used to check our device. The clock pulses are fed to clock-enable pin 13 of IC1, which starts counting. As soon as output pin 1 (Q5) of IC1 turns high, input pins 5 and 6 of NAND gate N2 will also become high via switch S5 because high-frequency clock allowed five pulses during momentary pressing. This high input of N2 provides low output at pin 4 to disable NAND gate N3 and finally no pulse will be available to advance counter IC1. Before the next usage, counter IC1 must be in the standby state, i. e. Q0 output must be...




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