The CDMS II Veto Readout Electronics

A Prototype Sample and Hold Circuit -The original idea for the veto front end amps was to continually sample the input pulse height and hold the pulse height for any pulses passing a low voltage threshold (~10mV). This mixed analog and digital circuit was actually made to work. Unfortunately, the highly variable risetimes of the input pulses cause
The CDMS II Veto Readout Electronics - schematic

d large pulse height errors for all but a very limitied range of input pulse heights.

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