The enable signal for USB chip and GLCD controller were made by PLD decoder from the address lines. As we have seen the memory map for i/o of 8051SBC board, the available space is from 0x0300-0x07FF. The address range of 0x0300-0x03FF was used for USB chip for both RD and WRITE operations. The GLCD used 0x0400-0x04FF with A0-A3 for selecting the i
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nternal registers from 0x0404-0x040B. We have learned from 8051SBC on how to use PLD as the memory decoder. In the schematic you may see the equivalent logic symbol for each enable signal. Let study the logic equation shown in Figure 3 and the equivalent logic circuit, you will understand how easy it is. Figure 4 shows the sample layout made by universal pcb. We see that with a PLD, the glue logic will be put together in PLD chip. The left-hand, J4 is 26-pin connector for USB board. And the bottom connector, J3 is 20-pin SIP connector for GLCD board. The right-hand connector J2 is for 8051SBC expansion header. Upper is manual switch for backlight turn on/off. Figure 3 shows the USB module made by Astron Logic Company. The evaluation kit consists of USB board, user manual, cable and software CD for driver and test software. The kit is available at low-cost, to get it please contact Astron Logic directly. The USB board is based on FT245BM. The chip provides complete hardwire USB protocol that conforms USB1. 1 and USB 2. 0 (full speed mode). The FT245BM can learn more from Future Technology Devices International: FTDI. The graphic LCD is based on Samsung KS1208 or Hitachi HD61202 controller. The address of internal registers were mapped into external memory from 0x0404-0x040B. To access them we can use pointer with absolute address directly. The testing code is just display BMP file. However some function can be modified for...
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