Xilinx ISE Schematics Sequential Circuit

Posted on Feb 4, 2014

In this lab we will be using flip-flops. Xilinx offers a large library of sequential circuits. Make sure to check it out when searching for circuits: Xilinx Refernce Library. The circuit we want to implement in this lab is a sequential circuit controlling 3 LEDs, one Green, on Yellow, and one Red that stay on for one cycle of the clock in the fol

Xilinx ISE Schematics Sequential Circuit

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lowing fashion: When the outside command cmd is 0, the cycling stops on Red. If cmd is activated when the light that is on is not Red, the cycling still follows the Green-Yellow-Red path, and stops on Red as long as cmd remains 0. Xilinx supports many different flip-flop models, some with active low signals, some with negative edge clocks. You can find them all in the Xilinx Library Manual (in pdf form). We`ll pick the FD flip-flop for this lab: You can verify that a set of wires are connected properly by using cursor mode (you click on the cursor arrow in the vertical menu) and clicking on one of the wires. Every wire connected to that wire, including this wire, will turn red. Synthesize your circuit (in Impement Design menu of options). Continue only if your synthesis is successful. Otherwise figure out what the bugs are from the error log in the console window. Our design for this 3-state sequencer has a transient state. When Q1 and Q0 are 1 1, the system is in State 3, for which Yellow is 1, and it should automatically bring the FSM to State 0, where Red should be 1. We cannot verify its correct behavior, unless we find a way to force Q1 and Q0 to 1. One way to do this is to modify the schematics and use different flip-flop designs that have a Preset input, and modify the Verilog test module to activate this Preset at the right times.

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