ttl three state logic probe circuit

The circuit presented here usesNAND logic gates of Hitachi HD seriesIC HD74LS00, which is a quad NANDIC. Special technique has been employedto obtain three-state operation usingjust a single IC. Gate N1 is wired such that when theoutput of gate N1 is at logic 0` (i. e. whenits input is at logic 1`), LED1 will glow, to indicate high state of the poin
ttl three state logic probe circuit - schematic

t beingprobed. Gate N3 is wired to light LED3when the output of gate N3 is high orwhen the point being tested is at logic 0`level. At power-on, the output ofNAND gate N2goes low. This isthe default state ofthe gate. The outputof gate N2 goeslow (indicated byglowing of LED2)during the followingsituations: If any other type of IC (e. g. 74HCT00 or 74LS00) is used, diodes D2-D3-D4 should be added or deleted asnecessary; for example, when usingHD74LS00, one diode D2 is required.

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