Parallel port controls arbitrary-waveform generator

During the output-waveform operation, latches IC1 and IC6 disconnect from the bus, and the memory delivers the stored data (for example, ~OE=0, ~WE=1). For each accessed location, one of the binary words stored during the load-waveform operation transfers to IC8, a DAC7621. This transfer causes the DAC to deliver one output point in the waveform. The VFC causes IC9 to clock through all possible addresses. IC11 resets the counter when the memory sequences through all possible addresses. When IC9 resets to zero, the waveform begins to repeat itself. Thus, each waveform comprises 2048 data points. The number of points, N, and the clock frequency, C, control the frequency of the arbitrary waveform: fAWG=1/NTC, where TC is the period of the clock frequency. IC2, IC3, and IC4 form a circuit that adjusts the clock frequency, C, via the parallel port. The clock rate C controls the frequency of the arbitrary waveform. The output frequency of IC4, a VFC110 VFC, is directly proportional to its input voltage. With a full-scale input of 10V, the VFC110 delivers 4 MHz. IC3 provides a voltage output of 0 to 10V, thus providing frequency control from near 0 Hz to 4 MHz. The voltage output of IC3 receives its programming via the parallel port, thus allowing computer control of the clock rate. Thus, the circuit provides a frequency range of 7.6 Hz (1/(2048×64 µsec)) to 125 kHz (1/(32×250 nsec)). Figure 2 shows various...