This circuit determines whether more than one input in a group of digital inputs is active. It provides a digital measure of the number of active inputs, and it allows you to establish a threshold for majority-decision applications. That is, whether the number of active inputs is more than, less than, or equal to a value between 1 and 15. You can monitor more inputs by cascading the adders. Each binary adder, IC1 and IC2, forms two full adders (FAs). Each FA monitors three input lines and generates a 2-bit output representing the number of inputs active.
Multiple-input-detector - schematic

IC3 and IC4, by summing the outputs of two FAs plus an input line, individually measure how many in a group of seven inputs are active. Similarly, by monitoring the 3-bit outputs of IC3 and IC4 plus one input, IC5 measures how many in the group of 15 are active. The OR gate, IC6, simply indicates whether more than one input is active.

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