# Digital Gates

Posted on Aug 17, 2012

You're simulating a circuit, it requires several digital gates, but you don't have a mixed-mode simulator. What to do? One solution involves creating simplified versions of the logic functions. To do this, we look to the NMOS transistor implementation of logic gates where the transistor acts like a voltage-controlled switch. But, instead of the transistor, we'll use the SPICE switch. Just like the transistor, the switch is defined to turn ON when the input voltage goes HI.

So let's have a go at simulating the NAND gate. How do you describe its function? When both A and B are HI, the output is LO. Or stated another way - it's the AND function with an inverted output. The circuit appears below. S1 and S2 in series create the AND function; RL in the pull-up position inverts the output. Defining the NAND gate as a subcircuit makes it easy to insert it into a few locations if you wish. The subcircuit nodes are listed in parenthesis. Simulate the SPICE circuit named LOGIC_SW.CIR. VA and VB create two binary signals that form the sequence 00, 01, 10 and 11. VCC = +5V supplies power to the logic gate. Plot the inputs V(1), V(2) and the output V(3). For a clearer view, you might want to plot V(3) in a separate plot window. Does the output go LO when V(1) and V(2) are HI? Defining the term R(3,5) as the resistance between switch nodes 3 and 5, you can interpret the model as follows. If V(1,0) ? 2.6V then R(3,5) = 10 ?. Similarly, if V(1,0) ? 2.4V then R(3,5) = 1 M?. Between the ON and OFF voltages, 2.4V ? V(1,0) ? 2.6V, the resistance varies continuously between RON and ROFF. (Using RON, ROFF, you could define a switch that turns OFF when the input goes HI.) You could run into trouble when running a transient analysis on devices with fast transitions. SPICE algorithms may fail under these conditions. This is especially true with complex circuits having feedforward or feedback paths. ( Like RS...

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