10 Bit A-D converter circuit

Hosted circuit

This circuit is also Crossed to: Analog to Digital

Each time a pulse is applied to the conversion of the control input, Ql resets the 1000 pF capacitor to 0 V. This action takes 200 ns to reset the falling edge of the convert command pulse, the capacitor begins to charge linearly. In exactly 10 microseconds, it loads to 2.5 V. The ramp is 10 microseconds applied to the positive input of the LTl016. The LT1016 compares the ramp Ex, the unknown, its negative input. For a 0 V - 2.5 V range, Ex is applied to the resistance of 2.5 k ohm.

On a 0 V - 10 V, 2.5 k ohm resistor is grounded, and Ex is applied to the resistance of 7.5 k ohm. LT1016 output is a pulse whose width is directly dependent on the value of Ex. This pulse width is used at the gate a clock at 100 MHz. The 100 MHz clock pulse bursts that appear at the output is proportional to Eg for a 0 V - 10 V input, 1024 pulses appear full scale from 512 to 5.00 V, etc.

Datasheet file1: Click here to download LT1016.pdf datasheet.

Datasheet file2: Click here to download LT1004.pdf datasheet.

Datasheet file3: Click here to download 2N2369.pdf datasheet.

Datasheet file4: Click here to download 74AS00.pdf datasheet.

Datasheet file5: Click here to download HP5082.pdf datasheet.

Datasheet file6: Click here to download 2N2222.pdf datasheet.

Datasheet file7: Click here to download 2N3906.pdf datasheet.