A common method of transforming the output current of a photodiode into a voltage signal, paralleling the photodiode with a high-value load resistor, produces a nonlinear response. Also the combination of the load`s transresistance, Rr. and the photodiode`s junction capacitance, C` slows the circuit`s response time. Figure 67-11B shows virtually the same components as Fig. 67-llA rearranged to maximize the inherent speed and linearity of the photodiode.
Photodiode-source-follower - schematic

The SP4010 (available from Hybrid Systems, Billerica, MA) is a unity voltage-gain buffer with aJFET input, 60-MHz 3-dB bandwidth, and 18-bit, 0.0004%, linearity over a ±10 V input range. In the circuit of Fig. 67-11B, the photodiode sees a constant voltage across its terminals, which is essential for linear photodiode outputs. The optional zener diode, Dz, sets a reverse bias at the photodiode for lower junction capacitance and higher speed. If you don"t use Dz, be sure to connect the feedback loop. An optional diode, DcLAMP. limits the output in case of unexpected light bursts, but results in increased dark-current leakage and lower speed. The buffered output of the circuit equals the photodiode current times the transresistance, RT· Figure 67-llC shows the circuit"s response to a fast light pulse.

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