Tanktwanger circuit puts a new spin on clock synthesis

Clock Input Frequency Divider

1. THE INPUT CLOCK frequency fed into this circuit is divided by 2n-l. The circuit consists of clocked flip-

simple clock dbler

A week or 3 ago I posted a question about reccomendations for building a simple clock doubling circuit, to operate at approx 500kHz, using CMOS logic. The circuit functions quite well and is stable. If the Not gates are omitted, however, it becomes unstable, and gives variable width pulses.

digital clock circuit

The Clock Controller was designed to be an exemplary of using 'C' language to control timer0interrupt, 7-segment LED and keypad scanning. It provides 1-bit sink currentdriving output, for driving a relay, opto-triac, say. Many projects requiring7-segment display and keypad interfacing may get the...

Glitch-free-turbo-circuit

This simple circuit generates a dual-speed clock for personal computers. The circuit synchronizes your asynchronous switch inputs with the master clock to provide glitch-free transitions from one clock speed to the other. The dual-speed clock allows some programs to run at the higher clock speed...

Digital Clock with 6 nixies

The clock will have 6 digits and time setting will be done by means of a few buttons. I will try to use the most common types from widely used microcontroller families of miscellaneous producers. I will write the program in C language. Nixies need high voltage for operation. I wanted to avoid...

74ACT74 makes low-skew clock divider

Serial-data systems often generate an internal clock at twice the data rate for mid-bit sampling or for generating bi-phase codes. External equipment and some internal processes require a clock that runs at the data rate.

Bootstrapped Timer

This circuit demonstrates how to use bootstrapping to seriously boost the output power of the timer. The LC555 can only put out about 50mA as it is. This circuit can put out at least 200mA and goes to the rail as well.

20Mhz-clock-phase-lock

The 20-MHz clock phase-locks to Apple"s Mac II 10-MHz NuBus clock. It uses a simple, inexpensive CMOS circuitry to generate 10-and 20-MHz square waves. The output duty cycle settings are insensitive to Vee variations. The input to the circuit is a NuBus clock signal with specifications that...