Bedside lamp with CD production delay
Posted on Dec 11, 2010 10677
FIG inverter I, II and R1, R2, CI and SB constitute bistable trigger switch, each time the switch SB, the anti- phase II level to the output of a change. Composition R3, C2, VD
1 inverting clamor I, t monostable delay circuit, adjust the value of the entire R3 or C2 can change the delay time of the circuit. Inverters V, f used in parallel to increase their ability to drive. VT transistors and peripheral resistors vs SCR zero trigger circuit, when vs turned on the lamp lit H: vs turned off, the lamp H goes out. 220V AC power via a resistor R8 buck, diode VD4, VD5 rectifier, VD6 stable regulated output voltage DC 6V for the use of the entire circuit.