Home RSS available
Username Forgot your password?  
Free Electronic Circuits, Diagrams,

Schematics and Projects.

Delay Circuits

 

| Clicks: 765 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
This circuit waits for a set time and then activates a relay. With the cap that is in the schematic you will get about a 6 sec delay till power on. You can change the cap in this circuit to 470uF for about a 20 sec delay...
| Clicks: 14817 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
Figure 1 shows the implementation of a small pulse generator. The operating principle of the circuit lies in applying two `1` levels to the AND-gate input before the delay line switches high. Figure 2 shows the signals associated with the circuit in Figure 1. Figure 3 shows a typical application circuit for the one-shot multivibrators. You can use IsSpice4 or PSpice to simulate this sample/hold circuit. Figure 4 shows the waveforms associated with the circuit in Figure 3..
| Clicks: 15793 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
This circuit uses a simple 4060 IC oscillator/timer that is reset periodically by a computer. Should the computer fail to send a pulse, the output changes state. The time can easily be set from seconds to hours...
| Clicks: 18172 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
As an example, a PWM control circuit (Figure 1) must handle relatively long delays while retaining information about the input duty cycle. The upper half of this dual-path, precision one-shot works on the input signal`s rising edge. The rising edge triggers the D flip-flop, IC3A, to drive IC4A`s input low. IC4A has an open-drain output; the output therefore rises exponentially according to the single R1C1 time constant. IC1A compares the output with a dc voltage equal to 67% of VCC, producing a conveniently scaled delay equal to R1C1...
| Clicks: 18353 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
Using a more precise delay line, the circuit can output a triple clock (Figure 1b). The MSD1000 series of silicon delay lines from Maxim Integrated Products (Sunnyvale, CA) provides 5- to 500-nsec delays with nominal accuracies of ±5%. The manufacturer can also customize standard delays to meet special needs...
| Clicks: 11208 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
When activated by pressing a button, this time delay relay will activate a load after a specified amount of time. This time is adjustable to whatever you want simply by changing the value of a resistor and/or capacitor. The current capacity of the circuit is only limited by what kind of relay you decide to use...
| Clicks: 19219 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
The AD8055-based amplifier has greater-than-100-MHz bandwidth, fully adequate for the 10-MHz oscilloscope. Its input impedance is 1 M in parallel with 30 pF to match the oscilloscope`s input and its low-capacitance probes. Figure 2b shows the final eye pattern, using the amplifier, the two-stage equalizer, and the 750-nsec delay cable. This pattern is essentially identical to the eye pattern that ensues using the oscilloscope without the circuit in Figure 1, except for the 750-nsec temporal shift...
| Clicks: 16309 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
Here`s a power-on time delay relay circuit that takes advantage of the emitter/base breakdown voltage of an ordinary bi-polar transistor. The reverse connected emitter/base junction of a 2N3904 transistor is used as an 8 volt zener diode which creates a higher turn-on voltage for the Darlington connected transistor pair. Most any bi-polar transistor may be used, but the zener voltage will vary from about 6 to 9 volts depending on the particular transistor used...
| Clicks: 13291 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
Figure 1 shows the outputs of one such current CCD driver, Intersil`s EL7212 (www.elantec.com), with a dual-phase input clock. The overlap in the output stems from the turn-on and -off delay mismatches of the EL7212. In a low-resolution system with a lower clock frequency, the delay mismatch is an insignificant part of the clock period. As CCD scan rate increases, the mismatch becomes a large part of the clock period. You need a new approach to correct the CCD-driver delay mismatch. Figure 2 shows a circuit that uses amplifiers to sense the delay mismatch and correct it...
| Clicks: 16721 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
Lately, designers have been inserting negative-temperature-coefficient thermistors in series with some loads, such as switch-mode power supplies. This device presents a high resistance at the instant of switching, thus limiting the inrush current. After a few cycles, the resistance of the thermistor drops to a low value, allowing normal operation of the load. In contrast, the circuit in Figure 1 physically inserts a resistor in series with the load to limit the inrush current and then short-circuits the resistor after a time delay...
| Clicks: 3432 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
No description available...
| Clicks: 6829 | Votes: 0 | Comments: 0 | Rating: 0 | Rank: 0
The time delay for the common emitter will be approximately 3 time constants or 3*R*C. The capacitor/resistor values can be worked out from the relay coil current and transistor gain. For example a 120 ohm relay coil will draw 100 mA at 12 volts and assumming a transistor gain of 30, the base current will be 100/30 = 3 mA. The voltage across the resistor will be the supply voltage minus two diode drops or 12-1.4 = 10.6. The resistor value will be the voltage/current = 10.6/0.003 = 3533 or about 3.6K. The capacitor value for a 15 second delay will be 15/3R = 1327 uF. We can use a standard 1000 uF capacitor and increase the resistor proportionally to get 15 seconds...
Sort List by: Alphabetic Date Clicks Rank    ascending | descending