Peak detect and hold

  
If the voltage at the input exceeds the voltage on the capacitor, then the output of the 741 goes positive, the diode conducts, and the capacitor is charged up to the input voltage-forward voltage drop of diode. When the voltage at the input is less than that on the capacitor, the output of the 741 goes negative, and the diode cuts off
Peak detect and hold - schematic

To prevent the capacitor from discharging through the input resistance of the next stage, a high input impedance buffer stage (IC2) is used. The circuit can be reset by means of a FET or similar high impedance device connected across the capacitor.




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