Sample and hold


Posted on Nov 17, 2012

The JFETs, Ql and Q2, provide complete buffering to Cl, the sample and hold capacitor. During sample, Ql is turned on and provides a path, rds(on), for charging Cl. During hold, Ql is turned off, thus leaving Ql Id (< 100 pA) and Q2 Igss (< 100 pA) as the only discharge paths


Sample and hold
Click here to download the full size of the above Circuit.

Q2 serves a buffering function so feedback to the LM101 and output current are supplied from its source.




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