Tachometer

  
A standard shaft encoder`s A and B ports generate square waves with the same frequency as the shaft turns. The phase of A will lead or lag that of B by 90°, ~depending on the direction of rotation. To obtain maximum resolution, the tachometer circuit must count every change of the state for the A and B signals. Each such change causes a change of state at IC1A`s output, followed by a 1-!LS negative pulse at the output of IClC. These clock pulses` positive (trailing) edges cause the counter to count up or down, according to the direction of shaft rotation.
Tachometer - schematic

You should set the RlCl time constant, so that it is approximately twice that of the R2C2 product, to ensure adequate setup and hold times for the up/down signal with respect to the positive clock edges. IClC supports this timing requirement by producing clock pulses of similar duration for either positive or negative transitions or IC1A. The exclusive-NOR logic of IC1B generates the correct polarity of the up/down signal when necessary, at the positive clock edges, by combining the A value with the B value just prior to a transition of A or B. Cl provides memory by sorting the B value voltage for about 2 !LS-The maximum frequency for A or B is approximately (4R1Cl)-1.




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