EEPROM DAC with DS interface

Posted on Mar 29, 2013

This device provides three channels of 8 bit pulse-width modulation. Output pulse duty cycle ranges from 0 to 255/256 in 255 steps. DACs may be loaded by the DS interface. DAC values may also be copied into the on-chip EERPOM and then automatically be loaded into the DACs when power is applies, making it useful for automatic set up of circuits that do not contain microcontrollers. This replaces more expensive EEPROM DACs and EEPROM pots in many applications, owing to its use of a small area high volume integrated circuit microcontroller. Additionally, one page of 16 bytes of on-chip EEPROM storage is accessible via the DS interface.

EEPROM DAC with DS interface
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With the values for the RC (resistor-capacitor) filters given on the schematic above, the worst case ripple will be about 1/2 lsb at 5V. Lower power supply voltages casue the ATtiny12's osciallator frequency to dorp, thus to maintain 1/2 lsb ripple, it would be necessary to increase the resistors or the capcaitors in the output filter. If during reset initialization, the EEPROM checksum is found to be correct, the DAC values stored in EEPROM will be loaded into the DACs. As such, the DS interface pins can be permanently tied to ground if the situation calls for it. Similarly, if the reset input is not used, the 100k resistor may be omitted and pin 1 tied directly to VCC. If the reset input is tied directly to VCC check the final assembly language code carefully to make sure that DDRB bit 5 is never set as an output and PB5 is never driven low because port B bit 5 is an alternative function of pin 1. The DS DAC is composed of a DS interface followed by an Incoming Data Register and an Instruction Interpreter. The instruction interpreter moves to and from the register file and the EEPROM and controls the DAC control. Instructions provide for reading from and writing the register set and the EEPROM. Using the DS interface, DAC values are written to registers 0, 1, and 2 to control DAC 0, 1, and 2, respectively. The DAC control blocks creates a bit-reversed image for use by the PWM routines and places them in registers...

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