Posted on Nov 7, 2012 10952
The oscillator section uses three sections of a 7400 quad NAND gate integrated circuit. The 1-MHz signal from the oscillator is fed into a 7 490 decade counter configured to divide by ten, providing the 100kHz signal. To obtain the 50 and 25kHz outputs, the 100-kHz signal is further divided by 7473 dual J-K flip-flop. The first half of the 74 73 divides the 100-kHz signal by two, yielding the 50 kHz signal. The second half of the 7473 again divides by two, giving the 25kHz signal. S2 selects the output, a square wave, rich in harmonics.
The generator can be powered from any convenient 6 to 12 Vdc source. A 7805 fixedvoltage regulator supplies the regulated voltage for the oscillator and the divider chips. The generator described here is powered by a 9-V transistor radio battery.