FPGA-based fingerprint identification system schematic


Posted on Mar 28, 2007

ASIC design choosing highly integrated, low-power, short development cycle to complete this FPGA design to achieve a system of background, has a strong practical significance a


FPGA-based fingerprint identification system schematic
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nd broad market space. Companies using xilinx Spartan 3E FPGA family as the core control device, this device uses 90ns advanced technology, the maximum capacity of 500,000 to support 32-bit RISC processor with 128 Mbit Parallel Flash, sufficient to meet the design requirements. The project used to manage embedded soft-core implementation of the system using hardware recognition algorithms to ensure the integrity and validity of the identification system functions. The design uses a Fujitsu MBF200 fingerprint sensor, MBF200 hardware block diagram shown in Figure 6, the use of SPI mode, so MBF200 and FPGA only through MISO, MOSI,/S/C/S, SCLK four ports are connected./S/C/S is MBF200 enable terminal, SCLK is MBF200 system clock when required fingerprint signal, FPGA to/S/C/S to send low level, MBF200 work. FPGA through MOSI MBF200 to send control commands to control MBF200 data output mode and the transmission mode. VDD [3: 1] as a digital power input, VDDA [2: 1] as an analog power supply input, VSS [3: 1] is the digital ground, VSSA [2: 1] to analog, so the connection shown in Figure. In order to prevent interference with the digital signal analog signal with a 10 ohm resistor separated. And it is also connected between the input and the corresponding digital supply digital ground capacitance to the Court unless the DC signal. In order to prevent interference with digital signals between the ground, the design uses 0 ohm isolation. 0 ohm current path corresponds to a very narrow, can effectively limit the loop current, the noise is suppressed. Has a damping effect on the resistance in all frequency bands (0 ohm impedance there), this is stronger than the magnetic beads. MODE [1: 0] pins are used to set the interface mode MBF200 used in this design, set MODE [1: 0] is 01, SPI transmission mode is selected. In SPI mode which, AIN, ISET, FEST three interfaces will not spend, but according MBF200 internal circuit structure, preferably resistor connected to ground.




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