Internal functional block diagram of NCP5201

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Having two sets of PWM signal generating circuit within NCP5201 chip, a set of output pins and the
Internal functional block diagram of NCP5201 - schematic

feet two opposite phase PWM signal, respectively applied to the gates of the three field effect transistor, the field effect transistor so that two sets are alternately turned on the battery supply voltage into a pulse voltage, then by L2, COUT filter becomes +2.5 V voltage supply for the memory. At the same time, + 2.5 V power supply is applied to the chip @ foot inside the chip provided with a second set PWM signal generating circuit and two field-effect transistors. The two field effect transistors of the voltage of 2.5 V into a pulse signal, pin output by the chip, the C14, c15, C16 after filtered output DC voltage 1.25 V, power the circuit memory.

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