Posted on Jun 5, 2012

This circuit takes as an input a signal from a 5-V CMOS logic circuit and outputs a high voltage of the same polarity. The high-voltage supply can be varied from ±30 V to ±150 V without the need to change circuit components. The input voltage is applied to the gates of transistors TRl and TR2. TR3 is optically coupled to D1 as is TR5 to D2. R5limits the current through D2, while R3 and R4 reduce the affects of leakage current.

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The light transmitted by Dl turns TR3 on and discharges the gatesource capacitance of TR6, which turns TR6 off. At the same time, TR5 is off and a constant current produced by R6, R7, D3, and TR4 charges the gate-sourced capacitance of TR7, thus turning TR7 on. With TR7 on and TR6 off, the output is pulled close to the lower supply rail. When the input is high, TRl is off and TR2 is on. Therefore, D2 conducts, which turns on TR5. With TR3 off and TR5 on, TR6 turns on and TR7 off. The output is pulled towards the higher supply rail.

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