This project arises from the need to home-build a valid tuning control for a multi band transceiver.
It consists of a partial syntesis V.F.O. that fits to single conversion equipments with an I.F. stage
nearby 9 MHz. The circuit can cover the whole H.F. band from 3.5 to 30 Mhz (i.e. 12.5 to 39 Mhz
This device has been developed through several experiments based on PLL and crystal conversion
circuits, and I think it may represent an acceptable compromise between the simplicity ( but not
enough to be regarded as an elementary job ) and the performance.
Consider that some equipment is necessary for the alignment : an R.F. generator and a frequency
meter are a must, but the availability of an oscilloscope makes the job easier (specially in case of
Click here to download the full size of the above Circuit.
The VFO circuit could be better replaced by a more sophisticated DDS unit like the Digi VFO
and related Digi Brain presented in the May ‘95 and March ‘96 issues
- two buffers wich drive an external frequency counter and the first mixer stage (the second PCB).
The output level to the mixer should be about 3 Vpp. This PCB also contains the 7810 power
- the first mixer and related 41 Mhz filter (the third PCB). It uses a BF960 mosfet as a mixer and a
2N2222 as a christal driven oscillator to obtain the 36 Mhz output from a 18 Mhz christal. L2 is made
by 9 turns, 0.5 mm wire on a T44-2 toroidal core (0.42 mH). A 41 Mhz output filter is obtained by L46
and L5 (9 turns, 0.5 mm wire on a T44-6 core, 0.34 mH) with a buffer stage (2N2222 transistor). L3
is made with 2 wires wound on L4.
The mixer alignement can be made in the following manner :
- remove the christal so as the oscillator goes off
- input a 41.2 MHz signal to gate 1 and tune the capacitors to obtain maximum output
- insert the christal and drive a 5 Mhz signal into gate 1 tuning the 60 pF capacitor for the maximum
output (0.7 to 1 Vpp)
second MIXER wich uses an NE602 IC. This device allowed to obtain the best results concerning
linearity and balancement over the entire frequency range. The input VCO signal is lowered by a
capacitive divider and the two balanced inputs (pins 1 and 2) are driven in opposite phase using a
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