Input 1 is used as a gating period, during which a single rising edge on input 2 will cause a logic 1 output-any other number, indicating non-identical frequencies causes a logic 0 output. ICla converts input 1 to a narrow pulse which initializes IC2 which forms a two-stage shift register clocked by input 2. On the first edge of input 2 a logic 1 appears on the output of IC2b and for all subsequent inputs a logic 0 is present. At the end of the gating period this output is.....
Integrated circuit Ul (a 555 oscillator/timer) is wired as a conventional pulse generator. The frequency of the pulse generator is controlled by potentiometer Rll. Resistor R2 puts areasonable limit on the highest speed attainable. The output of the pulse generator is fed to the common clock input of U2, a 74C175 quad D-type flip-flop. Each flip-flop is configured so that its Q output is coupled to the D input of the subsequent flip-flop. Information on the D input of.....
This simple circuit can color the sound coming from your audio system. Clocking for the circuit is provided by an oscillator built from one quarter of a 4093 quad NAND Schmitt trigger. With the component values shown, it will run at about 5 Hz. The clock frequency is fed to the gain control, pin 8, of an LM386 amplifier. Tremolo is produced by varying the amplifier gain. A trimmer potentiometer can be put in series with R1, to easily experiment with different.....
In applications where the period of the input pulses is uneven and the divider is required to cover a wide range of frequencies, the non-integer programmable pulse divider shown can be used. The purpose of the D-type flip-flop (IC2) is to synchronize the input signal with the clock pulse. When the clock pulse changes from low to high and the input is high, IC2 output goes high. Subsequently, IC3 resets to zero and starts counting up...
The preamplifier was designed to signal sources such as low-impedance moving coil cartridges (MC) on turntables high fidelity (and yet still there). The impedance of the amplifier is 100 W. To keep the noise levels low, three double-type transistors MAT03 SSM2220 or linked together to form a differential amplifier. Connecting this amp in front of an operand (OR27) is reduced to very low levels in noise input of the latter. The connections of the bases of the amplifier's.....
This circuit provides a simple, low-cost crosshatch generator tor convergence and geometry adJUStments on color TVs. The generator is driven by two clocks, one for the horizontal drive, IC1ab, and one for the vertical drive, IC2ab. The clock outputs are applied to the two binary counters contained in IC5 which generate the line and field sync pulses and respective blanking periods. Line clock pulses, buffered by IC1c, are differentiated by C3/R5 to produce the vertical.....
This circuit draws only 4 mA from a 5-V supply while driving a standard RS-232C receiver. The system clock drives a de-de converter that produces -3.4 V. The frequency can range from 0.5 to 8 MHz, but a range of 0.5 to 1 MHz will minimize power dissipation. The circuit output withstands direct shorts to ground or to either of the supplies ( ±12 V max). ..
A clock source using LM311 voltage comparator in positive feedback mode..
This circuit traps a single positive pulse from a square-wave train. Following the rising edge of an input command, the pulse-out signal emits a replica of one positive pulse of the clock signal simultane ous with the clock signal"s next rising edge. The 0 input command signal sets the Ql output of flip-flop "----IClA. ..
This self-starting fixed-frequency oscillator circuit gives excellent frequency stability. R1 and C 1 comprise the frequency-determining network, while R2 provides the regenerative feedback. Diode D 1 enhances the stability by compensating for the difference between VaH and VsurrLY· ..
The circuit will operate reliably from below 1 MHz to above 400 MHz. With Vcc = 5 V the output of the second inverter essentially attains a full swing from 0 V to 5 V. Such large logic output levels and broad frequency range capabilities make this oscillator quite suitable for driving MOS components such as CPU, controller chip, peripheral devices, as well as other TTL products...
The slot machine`s realistic action is provided by seven ICs and three displays, as shown. Two 555 CMOS timer ICs generate pulses. IC1 is used to generate the clock pulses for the entire electronic slot machine. The pulses are coupled from the output (pin 3) to the clock inputs of IC4, IC5, and 1C6, the display-driver ICs. The displays are common-cathode 7-segment LED types. They are wired to display three different symbols, an L, a 7, and bar, When all three displays.....
The electromagnetic ring launcher is comprised of.four subcircuits: a clock circuit (built around U5, a 555 oscillator/timer configured for astable operation), a count-down/display circuit (built around U3), a 74190 synchronous up/down counter with BCD outputs that is configured for countdown operation; U4, a ECG8368 BCD-to-7-segment latch/decoder/display driver; and DISP1, a common-cathode seven-segment display), a trigger circuit (comprised of U6), an MOC3010.....
This circuit gives a 3 phase square-wave output for a variable speed motor drive. Operation is straightforward, the 4017 counter is synchronously reset after six clock inputs. The she outputs are combined to give the required waveforms. It is interesting to note that although NOR gates are shown, OR gates will give effectively the same result...
This circuit symmetrically divides an input by virtually any odd number. The circuit contains n + 1h clocks tw..
This circuit uses a timer to generate pulses at a 5-ms clock rate. The pulses are shifted into the shift register, one at a ..
Six LEDs are arranged to produce a display the same as the dots on a dice. When PBI is depressed, the display is blanked and the oscillator (ICl a, b, c) clocks IC2 at about 1MHz. IC2 counts from zero and resets on seven..
The ATMEL, with family AVR, was consolidated in the field of microcontrollers. The microcontrollers are, providing fast core and a variety of peripherals. These features continue to occupy the attention of engineers and earn their preference. The developer will see, it accepts all models of the family of AVR. It is an excellent tool that stands out for its high performance and simplicity in handling. To develop, based on the record of AVR, the AVRDONGLE.PDF. If someone.....
When frequency stability is not of prime importance, a simple, yet reliable, digital clock oscillator can be made with the aid of relatively few components. High-speed CMOS (HCU/HCf) inverters or gates with an inverter function are eminently suitable to make such oscillators, thanks to their low power consumption, good output signal definition, and extensive frequency range. The circuit as shown uses two inverters in a 74HCf04 or 74HCU04. ..
An input signal drives both SN74 74 D-type flip-flops, which are positive edge-triggered devices. A low-to-high input signal transition triggers tbe A flip-flop, while a high-to-low input signal transition triggers the B flip-flop via tbe SN7404 inverter. Either flip-flop in tbe high state will cause the output to decrease via the SN7402 NOR gate. This in turn disables the opposite flip-flop from going to tbe high state. The flipflop in the high state remains there for.....
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