The common clock oscillator in Fig. 68-19A has two small problems: It might not, in fact, oscillate if the transition regions of its two gates differ. If it does oscillate, it might sometimes oscillate at a slightly lower frequency than its equation....

Symmetry of the square-wave output is maintained by connecting the right side of R2 through resistor R3 to the output of the third amplifier stage. This changes the charging current to the capacitors in proportion to the setting of frequency-adjusting....

The peak detector tracks and holds, using the charge-storing ability of a capacitor, the highest output voltage from a transducer. Initially, the voltage on the inverting input of the comparator is at ground level. As a small voltage (0-5 V) is captured by....

The I2C serial bus is a popular two-wire bus lor small-area networks. I2C Clock and Data lines have open collector (or drain) outputs for each device-on the network. Only a single pull-up resistor is needed. With this arcliitecture, each device can talk on....

U1 is a 4060 12-stage binary ripple counter that is used as a free-running oscillator; its frequency of oscillation is: 1/2.2 CIR2. The output of U1 is applied to U2, a 14-stage binary ripple counter that provides square-wave outputs of lfz, 1/4, "is, and....

The circuit monitors and displays a digital signal"s duty cycle and provides accuracy as high as ±1%. Using switch S2, you can choose a frequency range of either 250 Hz to 2. 5 kHz at ±1% accuracy or 2 kHz to 50 kHz at ±10% accuracy. The common-cathode....

The F — V input frequency is locked to the V — F output because the LTClG43's clock is common to both sections. The F — V's reference is used as one input of the multiplier, while the V — F furnishes the other. ..

The JFET Pierce oscillator is stable and simple. It can be the clock of a microprocessor, a digital timepiece or a calculator. With a probe at the output, it can be used as a precise injection oscillator for troubleshooting. ..

The circuit uses an ICM7213 precision one minute/one second timebase generator using a 4.1943 MHz crystal for generating pulses counted by an ICM7217B. The thumbwheel switches allow a starting time to be entered into the counter for a preset-countdown type....

This combination sync stripper and universal video interface can solve a lot of problems for you, including Super-Nintcndo-to-anything interfacing, video overlay and scope TV frame locking. Kits, fully tested units, and custom cable assemblies are available....

This switching circuit acts like a bank of interlocked mechanical switches; pushing one of the buttons latches its corres..

In this circuit, a 2-MHz clock is divided by eight in Ul, providing a stable 250-kHz carrier. Ql and Q2 buffer the clock and provide a low-impedance drive for op amp U4, which is a high-gain amplifier and integrator. U4 accepts audio inputs and converts the....

The Digi-Tach contains a master-clock circuits (U6)v latch and reset pulse generators (U2-b-U2-d), input signal bonditioner (Ul, U2-a), pulse counter (U3), display and display drivers (DIS1, DIS2, U4, and U5), and a voltage regulator (U7)...

The basic die circuit is given. A 555 timer, ICl, is connected as an astable multivibrator. This feeds clock pulses to divide-by-six counter IC2 tbe outputs of which are decoded by gates Nl to N6 to drive an array of LEDs in the familiar die pattern. When....

This circuit puts out a pulse when an object on the conveyor belt blocks the light source. The light source keeps the phototran-sistor turned on. This produces a high-logic-level voltage at the Schmitt-trigger inverter and a TTL-compatible low logic level at....

This circuit determines whether more than one input in a group of digital inputs is active. It provides a digital measure of the number of active inputs, and it allows you to establish a threshold for majority-decision applications. That is, whether the....

This mixer is built around a TL072 dual BiFET op amp with a JFET input stage, and can be powered from a single-ended 9-to 18-V power supply. The microphone input is capacitively coupled to the noninverting input of U1a. Resistors R1 and R3 set the voltage....

If you live in the frozen north, knowing your engine-block heater is working is a comfort. This device will let you know if yours is okay. Plug in PL1 to your power outlet. NE1 should light. Then, plug in the block heater. Depressing SI should cause the....

The data separator is intended for use with 8" flexible diskettes with IBM 3870 soft sectored format. The circuit delivers data and clock (B) and clock pulses (D). These two signals must be in such a sequence that the negative edge of the clock pulse is at....

With this unique logic-power-converter design (see the figure), a switchable 3.6 or 5 V at 200 inA can be attained by using four AA cells. The supply incorporates a MOSFET switch that can switch to a lithium backup battery, providing a 3.4-V output when the....

Using two SCRs, this control circuit is designed to lock out the other SCR when one has been triggered, so only one lamp will light. Indicator lamp Il is controlled by SCRl. The operator simply presses switch Sl. Lamp I2 is similarly controlled by S2....

Transistor Q1-configured as a source-follower buffer stage, offering a bit under unity voltage gaingives tbe unit a high-impedance input of about 1 MO shunted by about 10 pF, which keeps only minimal loading on tbe equipment being tested. C1 serves as....

This circuit shows a typical multiplex system intended to carry one of 8 inputs into a remote location. A 5-V pulse train is sent down a separate channel to perform timing and synchronizing functions. A 15-V reset pulse is superimposed on the 5-V clock,....

The purpose of D-type flip-flop IC2 is to synchronize the input signal with the clock pulse. When the clock pulse changes from low to high and the input is high, IC2 output is high. Subsequently, IC3 resets to zero and starts counting up. Until the counter....

Right- and left-channel signals pass through 1 C4-a and -b buffer amps into active crossover IG5; low frequencies are sent to the IC6-c mixer, and middle and high frequencies are sent to the analog delay lines of 1C1 and 1C2. That output passes through....

The circuit uses two gates of a 7400 IC cross-connected to form an astable multivibrator driven by the 1-pulse per second output of the digital clock IC. The hee-haw circuit has a low frequency astable modulator added to make a self-contained European-type....

Using a charge pump and oscillator, this circuit uses a 7-kHz oscillator. When the clock is high, C and D..

The AM Tuned Radio Frequency (TRF) receiver, has a sensitivity of about 1 m V at tbe input for an audio output of "iz W. Capacitor C22 couples audio signals from the power line to the PC board-it must be rated at 600 Vdc. R8 will cause F1 to blow, if C22....

A block diagram of the stereo-TV decoder is shown in A. It shows the overall relationships between the separate sections of the circuit; through show the details of each subsection. The decoder section centers around TCI, a standard 4.5-MHz audio....

This is a schematic and block diagram of a 2-MHz frequency counter. It uses and LSI counter/display driver, LCD readout, and a few logic chips for timebase and timing pulse circuitry. Q2 and Q3 form a signal (input) amplifier. The circuit contains a crystal....

A resistive voltage divider is used to establish a bias voltage for the input (Pins 2 and 3). The demodulated (multiplex) FM signal is fed to the input through a two-stage high-pass filter, both to effect capacitive coupling and to attenuate the strong....

The probe relies on the power supply of the CUT (circuit-under-test). The input to the probe, at probe tip, is fed along two paths. One path flows to the clock inputs of U2a and U2b. The other path feeds both the inverting input of Ulc, which is set up as....