Digital Combination Lock

  
The circuit above above makes use of the CMOS 4017 decade counter IC. Each depression of a switch steps the output through 0 - 9. By coupling the output via an AND gate to the next IC, a predefined code has to be input to create the output. Each PBS switch is debounced by two gates of a CMOS4001 quad 2-input NOR gate. This ensures a clean pulse to the input of each CMOS 4017 counter. Only when the correct number of presses at PBS A will allow PBS B to become active. This is similar for PBS C and PBS D. At IC4, PBS D must be pressed 7 times.
Digital Combination Lock - schematic




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