High sensitivity alarm

As shown in the simplified block diagram of the high sensitivity of the alarm circuit, wherein the photoresistor LDR and three ordinary resistor connected. Thus, when the light
High sensitivity alarm - schematic

is at full dark to light changes between full from the potential diagram X point range of about 1/4 to 3/4 of the supply voltage. This potential is applied to the input terminal while the two dual-contact switches. A self-excited oscillator and an inverter circuit controls a combination of these two switches alternately switching, typically a few Hz switching frequency, so that the two capacitors are alternately charged. As the double-contact switch in the off state its resistance is large, and the comparator constituted by the operational amplifier input impedance is also high. And the capacitor charge storage capacitor between the double contact switch and the comparator plates. Therefore, when the transfer switch, the discharge rarely. This constitutes a sample and hold circuit. When the charge (potential) capacitor comparator inverting input terminal (-) when the potential rises above the inverting input terminal (+) potential, or when non-inverting input terminal potential lower than the potential of the inverting input terminal, the comparator output becomes low, using the low to trigger followed by a single stable and relay.

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