ADSP-2103 or ADIs ADSP-2105 is produced by a digital signal processor. AD7714 and the ADSP-2103/2105 interface circuit as shown in FIG. When the output is active ADSP-2103/2105
and the RFS non-TES non-terminal configuration to the low level, the SCLK terminal is configured to serial clock output. AD7714 low level of POL termination. To ensure the AD7714 to work properly, ADSP-2103/2105 serial clock frequency should be limited to less than 3MHz.