Closed-Loop Peak Detector Circuit

  
This closed-loop peak detector circuit uses a Schottky diode inside feedback loop to obtain good accuracy. The 20- resistance RQ isolates the 0.01- load and prevents oscillation. The dc value is read with a DVM. At a low frequency, the error is small and dominated by the decay of the detector capacitor between cycles. As the frequency rises, the error increases because capacitor charging time decreases. During this time, the overdrive becomes a very small portion of a sine-wave cycle.
Closed-Loop Peak Detector Circuit - schematic

Finally, at approximately 4 MHz, the error rises rapidly because of the slew- rate limitation of the op amp.




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