This circuit relies upon the extra high input impedance of a FET, and also demonstrates
the gate terminals sensitivity to changes in voltage. The gate terminal here is left open circuit, connected only to the `probe` this being just a few inches of bare copper wire. With no fixed DC biasing, the gate terminal will respond to micro changes in voltage or `field strength`. It is important not to make this circuit on veroboard or PCB material as this will reduce the effective gate impedance.
Instead use an "open" construction technique soldering each component
together. The probe should not be touched directly and is best insulated in a plastic pen sleeve.
As static electricity can have either a positive or nega