When the handset is lifted and power is applied to the circuit, Q2 is fed base current through R2, which in turn drives Ql. C2 is charged via R3 in series with D1 to (Vz1 -0. 7) V. When the minimum operating Vnv voltage is reached, power on reset occurs via the rc network of Cl and RS. Q2 is maintained in the on condition by Gl, while Q3, and hence Q4, are held off by G2. The DF320 network appears in parallel with the telephone as an impedance more than 10 KO in the standby condition with the telephone network connected in circuit through Ql.
Parallel-telephone-connection - schematic

On recognition of the first keyed digit, the DF320 clock is started. Ml then goes to logic I causing Q2 and Ql to tum off, and Q3 and Q4 to tum on. Hence, the majority of the line loop current now flows through Q4 and Zl. When impulsing occurs, Q3 and Q4 are turned off by DP acting on G2. Line loop current is then reduced to approximately 50 f"A taken through R2, R4, and G2 in series. When dialing in, complete Ml goes to logic 0, causing the telephone network to be reconnected. The DF320 then returns to the static standby condition. If the line loop is interrupted by the cradle switch during dialing, impulsing will continue until C2 discharges to a voltage, such that R8 pulls CE to logic 0, causing the DF320 to reset. The diode bridge protects the network from line polarity reversal.

Leave Comment

characters left:

New Circuits