Digital Electronic Circuits Tutorial
Digital electronic circuits are used to implement logic functions and store digital data. Typical examples of such circuits are logic gates, microprocessors and semiconductor memories. Digital electronic circuits are also used to transmit information and interact with natural environmental sizes (analogue signals).
Digital Signal and Logic Levels
Digital circuits handle the information as a series of discrete "digits" as opposed to analog circuits, which process sizes from a continuous range of values. The majority of digital systems use only two "digits", implementing binary logic.
In digital electronic circuits, each bit (logic state - 0 and 1) is represented by a physical quantity of voltage or current. To avoid errors due to the inevitable presence of noise in any digital circuit, the voltage or current corresponding to each binary element does not have a specific value; on the contrary, each logic state corresponds to a predetermined range of voltage or current values. These areas determine the logic levels of the two digits.
The digital circuits operate in such a way that any added noise is rejected if it is less than a predetermined level. For example, if V0 noise VN is added to the nominal voltage V0 of the logic digit VN, the result V0 + VN will still represent the digit 0 if it continues to be within the predetermined range of the digit 0.
Even more important is the fact that if V0 + VN is driven to the input of a digital circuit, the result at the output will be restored to V0, or else it will have been regenerated. The regeneration of the digital signal between the various stages of the digital circuits is a very important feature that prevents the accumulation of the effects of noise on the signal and prevents the transmission of the lesions in the next steps.
Digital electronic circuits draw the energy needed to operate and regenerate the signal through two feed lines. The more positive is represented by VCC, while the negative (GND) is usually (not always) the reference voltage (0V) of the system.
Digital circuits use semiconductors (transistors) as active switch elements to implement binary logic. These transistors typically operate in cut-off states ("ON" and "OFF"). In modern integrated digital circuits mainly CMOS transistors are used, due to the high degree of integration they allow, while BJT transistors are used in special high-speed circuits.
Digital signal transmission
As previously stated, the transmission of digital information between the digital circuit stages, whether these are within the same integrated circuit or in different integrated circuits, requires the encoding of the logic states in voltages of current or current.
This encoding may be unipolar or bipolar. In the unipolar representation the two logic states are encoded in the presence or not of the physical quantity (eg logic 1 = 5V, logic 0 = 0V). In bipolar representation the logic states are represented by symmetrically opposite values (eg logic 1 = + 2mA, logic 0 = -2mA).
The transmission of the binary information from one digital circuit to the other is accomplished by means of a conductor which interconnects the output of the sending circuit (driver circuit) with the input of the receiving circuit (receiver circuit). This conductor may be on a printed circuit or consist of some kind of cable. The transmission of a signal actually occurs through a pair of conductors, even when this is not apparent, as for example in the printed circuit, where the second conductor is the common ground between a driven and driven circuit.
In voltage transmission (Fig. 1-1a) the drive circuit introduces a voltage level to the interface cable. The receive circuit compares this voltage with a threshold voltage and outputs the logic state of the incoming signal. The threshold voltage is usually in the middle between low and high. The ground is used as a common reference level for both the transmitted signal level and the threshold voltage in the receiving circuit.
Similar is the current transmission (Figure 1-1b), which circulates in the interface cable according to the transmitted digit. In this case, the current is driven into a resistor in the receiving circuit, and the voltage developed at the ends of this resistor is used to output the status of the incoming digit.
The transmission examples mentioned earlier use a single-ended transmission (and ground) for the transmission. An alternative method is the so-called differential transmission. Differential transmission uses two conductors to transmit a signal, with each conductor carrying the complementary signal of the other. Differential transmission has greater tolerance to noise.
Functional characteristics of digital circuits
The various digital electronic circuits are divided into categories ("reasonable families") according to their manufacturing technology and their operating characteristics. These features are the criteria for selecting a circuit to meet the requirements of the design. The description of these functionalities follows below.
Entry / exit levels and noise margins
Figure 1-2 illustrates the interface of two digital circuits.
The two logic states, high (HIGH) and low (LOW), correspond to corresponding voltage levels. These levels are denoted as follows:
• The low output level is called VOL (V output low), while the high output level is VOH (V output high).
• the low entry level is VIL (V input low), while the high input level is VIH (V input high).
In the same Figure 1-2 it is also shown that the leading gate provides (source) or drain current at / from the entrance of the driven gate according to the logic output state. The exact time and magnitude of the current in relation to the logic condition depends on the technology of digital circuits. Typically, the leading gate provides power when its output is in high logic state, while the drain current is in a low output state. The input/output currents are represented as follows:
• The current flowing to or from the gate output is IOL (I output low) for low logic and IOH (I output high) for high.
• In the direction of the gate, the current flowing from or to its input is denoted by IIL (I input low) for low logic and IIH (I input high) for high.
Under the prevailing convention, the current flowing inside a digital circuit is considered positive (+), while the current flowing out of the negative circuit (-).
It is recalled that under normal operating conditions, the input-output levels range to predetermined ranges. This allows the digital circuit to tolerate noise effects. Noise is one of the most important factors affecting the correct operation of each system. It comes either from external factors or from the digital circuit itself, and is generally due to fluctuations in the supply (and ground) voltages, neighbor interactions and reflections of the signal on the transmission lines.
The digital circuits operate with a margin of noise (voltage margin), within which the effects of noise do not disturb the proper operation of the circuit. This margin also allows the secure interconnection of similar integrated circuits with slight variations in operating characteristics due to construction parameters or due to the temperature difference.
Each digital circuit is characterized by worst case inputs and outputs, which introduce a noise margin for transmission of the digital signal. More specifically (Figure 1-3),
• the input of each digital circuit is characterized by a minimum high level VIH (min) and a maximum low level VIL (max). The circuit requires: (a) an input level greater than VIH (min) to be understood as a high logic state; and (b) an input level less than VIL (max) to be perceived as a low logic state.
• the output of each digital circuit is characterized by a minimum high level VOH (min) and a maximum low VOL (max) level. The circuit must: a) maintain the output voltage higher than VOH (min) for the high logic state; and b) the output voltage less than VOL (max) for the low logic state.
The VOL (max) and VIL (max) levels are not equal and their difference allows tolerance to the noise that may be added to the signal during transmission from the driver to the gate. The same applies to VOH (min) and VIH (min). The noise margin in the two logic states is defined as follows:
• the low margin noise (NML) is equal to NML = | VIL(max) - VOL(max) |
• the noise margin high (NMH) is equal to NMH = | VOH(min) - VIH(min) |
Logic levels and noise margins are also shown in the characteristic voltage transfer curve (output voltage to input voltage) of a logic gate, such as the inverter in Figure 1-4:
The characteristic transfer curve correlates the input voltage with the output voltage of the gate. When the output of the inverter is stable, it is outside the shaded areas, which crosses only in the transition from one logic state to the other. The hatched areas are those where the guaranteed output voltage will never be in smooth operation due to the VOH(min) and VOL(max) constraints.
A determining factor in the interconnection of digital circuits is their driving ability. The term "driving ability" describes the type and number of circuits that can be connected to the output of a digital circuit without altering the digital information. Driving ability depends on the ability to deliver power to the output.
Each digital circuit output, regardless of the manufacturing technology, presents an output impedance in each of the two logic states. The output impedance value is not constant, but dynamically changing depending on the output voltage. Generally, this value ranges between 5-50 Ω (depending on the manufacturing technology). The output power of the output is inversely proportional to the output resistance value.
When the output of a digital circuit is in a stable logic state, driving is dependent on the output power for supplying or drain current to / from the inputs of the driven circuits. The datasheets provide the maximum current values supplied by a digital circuit at its outputs in high or low state (IOH(max) and IOL(max) respectively). If the driven circuits require a higher amount of current than allowed, then the logic output level is shifted beyond the VOH(min) and VOL(max) operating limits (Figure 1-5).
Data sheets are also given the maximum amount of current required to drive each high and low logic input (IIH(max) and IIL(max), respectively). Using the maximum values of the input and output currents, the fan-out is output: the maximum number of identical circuit inputs, which can safely lead one output. The fan-out for the two logic states is calculated as follows:
While the lowest FO(L), FO(L) is taken as the total fan-out. In addition to the fan-out of a circuit, and especially in the cases of logic gates The term fan-in is additionally used. The fan-in equals the number of entrances to a gate.
In modern digital circuits, the demands of current inputs are small and can easily be covered. Greater driving difficulty occurs when changing from one logic state to another. The inputs of the guided circuits and the interconnecting conductors show parasitic capacities, which must be charged or discharged when changing the state. These capacities, when the interface conductor is short, can be represented as a CL capacitor (Figure 1-6).
The output impedance RO and the capacitances CL form a simple RC circuit. The charging / discharging speed of CL is determined by the time constant t = ROCL. If the initial voltage at the ends of CL is 0V and the full charge level is equal to VCC, the charging voltage at time t is given by the relation:
This relationship can be resolved to t to find the signal transition time. In order to change from 10% to 90% of the total transition range from one situation to another, a time T10% -90% = 2.2ROCL is required.
Very large CL results in too slow the signal from one state to the next, causing operating errors in the driven circuits. Manufacturers specify a maximum allowable transition time, which makes it possible to calculate the maximum possible number of guided entries with the help of the previous relationship.
Propagation delay and climb-down times
The size that characterizes the operating speed of each digital circuit is the propagation delay. The propagation delay describes the time from the change of the input state to the output of the output at the output of the circuit. The propagation delay is usually measured at 50% of the level change (Figure 1-7).
The datasheets provide the following sizes:
tPLH: the propagation delay when the output goes to high state.
tPHL: propagation delay when the output goes to a low state.
tPD: mean propagation delay, (tPLH + tPHL) / 2.
The propagation delay depends on the construction of the digital circuit but is also influenced by the VCC supply voltage, the driven capacities CL and the ambient temperature TA. Generally, the propagation delay increases with the increase of TA and CL, and decreases with the increase in VCC. In datasheets, propagation delay is given at specific VCC and TA values, while CL equals 15-50pF. It is also considered that only one output of the integrated circuit changes at any time. If multiple outputs occur at the same time, the propagation delay is increased because the supplied amount of current is shared across all the outputs that change state.
In modern high-speed systems, in addition to propagation delay, the rise / fall time (tr and tf respectively) of the signal during the transition from one logic state to the other is of particular importance. This time is usually measured from 10% to 90% of the level change (Figure 1-8).
Is already described the negative effect of the excessively slow transition time on the operation of the gates.
Similarly or even more important are the effects of over-fast signal transitions (very low rise / fall time or otherwise, very high rate ΔV / Δt of level change). These abrupt transitions cause high current peaks and are the main cause of noise and error generation in digital circuits. Thus, modern digital circuits have at their outputs devices that limit the rate of change of the level.
The power consumed in a digital circuit determines the degree of circuit integration and use. Low power consumption results in less heat dissipation and allows a large number of gates to be collapsed in the same integrated circuit, thus reducing manufacturing costs and increasing the functionality and performance of the circuit per unit of silicon surface. Low power circuits are also used on all mobile devices that are powered by batteries.
Consuming power is divided into two components: static and dynamic:
A) Quiescent power dissipation is consumed to maintain the state of the digital circuit outputs in a stable logic state. The static power equals the product of the VCC supply voltage to the ICC feed current flowing to the circuit from the power terminals. The ICC current is mainly due to the sum of the leakage currents in the semiconductor contacts of the circuit and increases with the rise in temperature, and is proportional to the complexity of the digital circuit.
Static power consumption of a circuit depends on its manufacturing technology. Circuits with bipolar contact transistors exhibit high static power consumption, unlike CMOS circuits, whose static power consumption is minimal.
B) Active power dissipation occurs when the internal nodes and circuit outputs go from one logic state to the other. The power here is consumed to charge internal and external capacities.
The power consumption for charging-discharging capacity C at VCC voltage with switching frequency f is equal to P = C · VCC2 · f. Therefore, the dynamic power consumption depends linearly on the operating frequency of the circuit.
An additional component of dynamically consumed power is also the current flowing between VCC and ground at the moment of change of state in the totem-pole stages. This power is also proportional to the operating frequency.
The maximum power consumption of an integrated circuit is determined by the maximum junction temperature (TJ) internally in the integrated circuit. The contact temperature TJ is the ambient temperature TA, plus the power consumption P:
TJ = TA + θJA · P
Where θJA is called the thermal resistance coefficient (°C / W) and depends on the characteristics of the package of the integrated circuit. The maximum allowable power consumption (without cooling) of the integrated circuit is:
Pmax = (Tjmax-TA) / θJA
Power supply voltage
The digital circuits are powered by two power lines, the VCC and the ground (0V). Grounding is usually used as the reference voltage for all circuit components and all integrated circuits of a system. Both ground and VCC should be as free as possible from noise and voltage spikes. For this reason, devices that provide and distribute feed voltages to a system are designed with extreme caution, using local decoupling capacitors and voltage stabilization circuits. On the digital circuit side, the specifications allow for a variation of about ± 10% from the nominal supply voltage.
Typically, digital systems use a VCC voltage for their entire circuitry. However, there are cases where circuits with different supply voltages, such as CMOS (VCC = 5V) and ECL (VEE = -5.2V) or low voltage supply circuits (3.3V, 2.5V, 1.8V) are needed. In this case, additional feed lines are required in the system.
A last characteristic of each class of digital circuits is the type and the number of logic functions they implement. Classical digital general purpose circuits include a wide range of logic functions, registers, meters, and so on. In various combinations of inputs.
Since, however, in modern digital systems all logic functions are integrated into minimal integrated ASICs, the newest logic families of digital circuits mainly include information transmission circuits: transmission-reception circuits, large-scale registers, and serial information inverters In parallel and vice versa.
Outputs of digital circuits
The output stages form the voltage levels displayed at the terminals of an integrated circuit. These levels reflect the status of the internal circuits of the circuit, depending on the logic function. The construction of the output stages determines how they are interconnected. Various types of output stages are listed below.
The most common digital output device is totem-pole (Figure 1-9).
In this embodiment, two active elements (transistors, in Figure 1-9 are symbolically represented as switches) are used to connect the output alternately to the VCC or ground. In this way the two logic output levels are produced.
In the totem-pole configuration, the two switches are driven with a complementary control signal and are never at the same time "closed", except for a minimum of time when switching from one state to another. At this minimum time, a conductive path between VCC and ground is formed, resulting in sudden peak currents and corresponding noise between feed lines.
Outputs of three states
When connecting multiple outputs to a common line (e.g., a data bus), at each time only one output can be active (i.e., transmit data) while the other outputs must in some way have a " Disconnected "from the common line.
Totem-pole outputs can not be connected to a common line because contention of the output logic states occurs: if one output attempts to transmit the high level, while another output is in a low state, then a current Short circuit through the two totem pole, from VCC to ground (Figure 1-10a). The collision results in the strain of the output stages (especially the high-end stage) and the increase in power consumption. This increase can lead to the destruction of exit levels.
To avoid collision, output stages (Figure 1-10b) are used, which can be fully "disconnected" from the common line, leading to a "third state" output, that of high impedance, symbolic Hi -Z).
Open Collector Outputs
An alternative to linking multiple outputs to a common line is to use open-collector outputs (Figure 1-11a). Exits of this type can produce only one of the two logic levels. For the production of the second level it is required to use an external resistor, which is connected to the corresponding feed line.
With the help of open collector outputs, wired logic functions are implemented. If, for example, multiple open collector outputs are connected together and a pullup to the VCC is used as in Figure 1-11b, then the common line will be in high mode only when all outputs are in high state. If even one output is in a low state, the whole line will also be in a low state (wired-AND).
Evolution of digital circuit technology
The first digital circuits of 50's implemented simple logic gates using discrete elements (transistors, diodes and resistors). In the mid-1960s, the first commercial integrated logic circuits appeared, containing 2-10 logic gates. The integration of these circuits is characterized as small scale integration (SSI).
In the next decade (70's), digital circuits passed from the medium scale integration (MSI) of 20-100 logic gates (registers, counters, etc.) to large scale integration (LSI ) With up to 1000 gates. During this period, the first microprocessor and semiconductor memory circuits appeared.
In the 1980s digital circuits with more than 20,000 gates (VLSI) appeared and the capacity of semiconductor memories reached 4Mbit per integrated circuit. New design techniques have been developed to reduce the silicon surface utilization, design time and power consumption. In the 1990s, the integration scale exceeded 1 million gates per integrated circuit and the design methodologies improved significantly. Recent digital microprocessor circuits consist of more than 40 million transistors, while the capacity of semiconductor memories is 256Mbit per integrated circuit.
The advantages of the ever-increasing integration of digital circuits are the increase in functionality and speed, while reducing the dimensions and cost of production. CMOS technology circuits are ideal in this case because their devices and the very low power consumption they present permit the very high integration of these circuits.
In parallel with the development of digital circuit technology, similar technologies, such as integrated circuit circuits and signal transmission lines, are also being developed to support today's high-speed digital systems.