Sequential Pattern-ANSI Standards Tutorial



A Communications System to function properly must use different rules for exchanging data between two devices. These rules are called protocol data communication system. There are several protocols that can be used. The type of protocol to be adopted in a data communication system depends on the needs of the system and its cost. The basic concept of a protocol is the handshake. The term is meant to exchange handshake signals between various emitting device (transmitter) and the camera (receiver) before data is transmitted. The handshake signals are used so that a device can "tell" if the other device is ready to transfer data. To explain the meaning of the handshake will use a simple example, where a computer connected to a printer. The computer sends data (characters, numbers, etc.) to the printer, and the printer prints the data.

Figure 14. Marks "handshake" must be exchanged between the computer and the printer When the printer receives the signal, called RTS (Request to Send Data), responds. If the printer is ready to receive data, it sends a signal to the computer called CTS (Clear to Send), using the CTS line.

To properly operate this channel of communication, the computer must be able to know if the printer is ready to receive data. This is necessary because the printer may be busy with some other printing data that has been received from the printer to a previous data transfer. If the computer sends data to the printer while the printer is busy (ie, print other data), then the transmitted data will be lost.

Therefore, signals "handshake" must be exchanged between the computer and printer (additional lines are used to transmit these signals) so that the computer "knows" when to transfer the data to the printer. In this type of transmission the first computer sends a message to the printer which asks permission from the printer to send data using a specific line (cable) that connects your computer to the printer, which used only for this modefessional.

When the printer receives this signal, called RTS (Request to Send Data) (request to send the data), responds. If the printer is ready to receive data, it sends a signal to the computer called CTS (Clear to Send) (free shipping) by using a special line for this signal (Figure 14). The CTS signal informs the computer that it can proceed with the transfer of data. If the printer is not ready to receive data, the printer sends a CTS but instead shows that it is busy.


The standard RS-232 was published in 1962 by the Electronic Industries Association EIA in USA. To RS-232 is an industry standard (recommended industry standard). The model was originally designed to determine the mechanical, electrical and logical rules interface for serial data exchange between a computer, called data terminal (data terminal equipment, DTE), and a modem, called communication device data (data communication equipment, or data circuit-terminating equipment, DCE), using the binary serial data transmission.

The model is now used to interface any any DTE DCE. Examples of DTE are computers, terminals, and printers, and DCE are modems and multiplexers. The RS-232 has been extensively used in personal computers, for example, mouse, printer, and scanner, as well as external modems and devices of control. These are some of the peripheral devices can be connected to port RS-232.

The formal name of the standard RS-232 interface is between data terminal equipment and data communication device adopting the serial binary data exchange (Interface between Data Terminal Equipment and Data Communications Equipment Employing Serial Binary Data Interchange,). In Europe paromio standard published by the CCITT and called V-24 standard. The standard RS-232 is almost the same as the standard V-24. Since the publication of the standard have been several revisions. The most recent revision of the "F" (232-F) made in 1997. The letter F indicates the sixth revision. The model is now known as What A / EI A-232-F, which represents the TIA Telecommunications Industry Association (Telecommunications Industry Association).

There are many ways to place a standard serial interface (ie, specific rules used to interconnect two devices) and RS-232 is one of them. To RS-232 is the most common serial standard used by a very large number of manufacturers. The RS-232 standard defines the rules for the serial transmission of data between a DTE and a DCE, and allows a maximum data transfer speed of 20,000 bits per second (bps). The maximum length determinant originally 50 feet (15 meters). This has been revised in the EIA-232D, 232-E EIA/TIA- and EIA/TIA-232-F, and now it is the total capacitance of the load (ie, load capacity and the capacity of the cable).

If the total load capacitance reduced by using special cables low capacity, the overall length is increased. By using the line amplifier cable length can be increased further. Notice that many users use the template over longer distances and higher speeds than those determined by the EIA. Although the RS-232 standard supports only low speeds and short distances, the standard is still a very good choice for many applications that do not require very high data rates, or over long distances and is widely used by a large number of manufacturers because of its simplicity and low cost implementation.


Unlike other models, defining only the electrical characteristics of the RS-232) is a complete model and defines the functional characteristics of the interface. That defines the functions of various marks (lines) used to the interface, and the electrical characteristics of the signals, the connector (connector), and control signals and handshaking required for the proper transfer of information between a DTE and one DCE.


The electrical characteristics and signals of standard RS-232 include requirements for signal voltage levels, the transition rate of change (slew rate) and input impedance and output circuits of exchange. The standard defines 25 channels of exchange (or lines), which are used to carry out the exchange of data between a DTE and a DCE. Each exchange line circuit or doing a particular task, required for proper data exchange.

The list of 25 circuits of exchange (or lines), their names, and the direction of the signals on the lines given in Table 1. There are 19 signal lines, 2 lines of ground (one ground is the signal, and the other is ground chassis or frame). The signals are divided into four different categories: data, control, synchronization, and general use. The terms DTE and DCE are very important in determining the direction of the signals.

For example, the line is called TD-data (transmitted data, or transmit data line) is used to transfer the data from the DTE to DCE. That the terminal 2 of DTE used to transmit the data, and the terminal 2 of the DCE is used to receive the data, as illustrated in Figure 15.

Therefore, a DTE transmit data from terminal 2, and a DCE receives data from terminal 2. Similarly, the circuit exchange called RD (Received Data) is used to transfer data from the DCE to the DTE, i.e. the pin 3 of the DCE is used to transfer data, and pin 3 of DTE used to receive data, as illustrated in Figure 15.

Figure 15. Pin 2 of DTE used to transmit data and pin 2 of DCE is used to obtain the data.

TABLE 1. Signals (channels) of the standard RS-232.

It is therefore very important to know whether the device used is a DTE or DCE. The way one can determine whether a device is a DTE or DCE, is to read the manufacturer's manual of the device to see if the RS-232 port on the device is designed as DCE or DTE.
Moreover, very often the user gives a block signal (pinout), which indicates the direction of signals. Although the standard defines 25 lines, usually not all of the rows used in a data exchange between a DTE and a DCE.

Many of the lines are used for the synchronous operation. Usually less than 11 wires are used for asynchronous transmission. The actual number and type of lines used depends on the specific application. Figure 16 shows the lines commonly used in synchronous and asynchronous applications. The important lines are those for the transmission and reception of data, ie lines 2 and 3, as well as the ground line (pin 7). The remaining lines are necessary for proper communication between the two devices.


To RS-232 uses standard connectors and DB25p DB25s. The letter p indicates that the DB25p is a male connector with 25 pins, and positioned in the device DTE. The letter s indicates that DB25s are (socket or female connector) jack or one female connector, and is located in the device DCE. Figure 17 shows an RS-232 (V.24) connector with 25 pins. Apart from these, there are plus with 9-pin bindings, called DB9p (plug) and DB9s (slot, socket). Figure 18 shows the connector DB9s. These connectors are used in asynchronous data exchange, which requires less than 9 wires to implement the interface. Today ^ what modern devices (eg, PC, notebooks, laptops), because of their small size, have replaced the 25-pin connector, with the smaller 9-pin connector of (DB9S).

Figure 16. The main lines of the standard RS-232.

Although patterns kothorizoun that a DTE must have male connectors and female connectors in DCE, manufacturers do not always follow this rule. Often the DTE and the DCE having the same ligand, in this case it is impossible for two devices to be connected without the use of a special adapter cable, or you need to replace one of their staples.


The standards define signal voltage levels, the rate of change and transition impedances inlet and outlet lines.


To represent the binary numbers requires two voltage levels. As I already mentioned, the positive logic TTL, a trend between 0V and about 0,8V, represents the binary bits 0 (or logic 0), and a voltage between 2V and 5V representing binary bits 1 (logical 1). The standard RS-232 uses the binary bits 0 (logical 0) and bit 1 (logical 1) in a different way. The binary bit 0 (or logical 0), also called SPACE, the output of the driver is represented by any positive voltage between +5V and +15V.

Figure 17.

The binary bit 1 (or logical 1), also called Mark, at the exit is represented by any voltage between -5V and -15V. The voltage range between -5V and +5V is called the transition region, and any signal thar exists within this area would create trends that may not be identified, and for this reason should be avoided.

The signal levels at the output of the driver for the standard B5-232 shown in Figure 19. A binary bit (MARK or SPACE) that cosists from the transmitter along the channel may have any voltage as long as it is within the range of Mark or Space. At the receiver a voltage between +3V and +15V is recognized as a logic 0 or SPACE, and a voltage between -3v and -15V is recognized as a logic 1 or MARK. The voltages between -3V and +3V located in transition region can not be recognized by the receiver.
The transition region is necessary because it creates a neutral zone between areas MARK and SPACE (bit 0 and bit 1), which reduces the probability of an error in the identification of a voltage level (i.e., one mark or one space) due to noise or attenuation of the signal, or any other cause, which can be alter voltage levels that represents the binary bits.

In standard RS-232 one checking signal considered to be active when the voltage on the line is positive (i.e., between +5V and +15V). A negative signal between -5V and -15V causes the line (or circuit exchange) to be deactivated. The voltage in pins of a connector must never exceed ±25V. All pins must be able to withstand a short short circuit with any other pin without suffering permanent damage.

Figure 19.


The signals always require a specified amount of time to change from a logical situation to another, ie from MARK into SPACE or SPACE into MARK. The pulses have never the shape of a rectangle as shown in Figure 20a, but rather the form shown in Figure 20b. The rise time and the fall time of the signals are due to the delay needed to charge and discharge the capacitance found at the circuit.

The transition rate of change determines the rate at which the voltage signals can be switched from mark (logical 1) in space (logical 0), and vice versa. The transition rate of change is given in volts per second (V/s), volts per millisecond (V/ms) or volts per microsecond (V/us).

For example, a transitional rate of change of 10 volts per microsecond (10V/us) means that the voltage can be changed at 10V in 1 microsecond. The signals change very fast, of the mark (logical 1) in space (logical 0) and back (i.e. pulses having short times anode and cathode) consist of several frequencies ranging from very low to very high.

Therefore, in order to process these signals without undergoing large deformation should use circuits with very large bandwidth. While the signals, which does not change very quickly composist of components that have very low and very high frequencies, and therefore these signals do not require processing circuits wideband frequencies.

The RS-232 standard defines a maximum rate of change in transition 30 volts per microsecond (30V/us), for the signals at the output of the driver. If you try to send signals with a higher transition rate of change of this setting the standard, then it will appear deformed. Therefore, to avoid this distortion, the circuit interface RS-232 decreases the rate of change transition, into signals having a rate of change greater than transitional 30n/mS, as shown in Figure 21.

The low rate of change in the transition RS-232 restricts crosstalk, which occurs between adjacent signal lines in a multicore cable. Notice that the lower the transition rate of change (ie, the larger? Rise time and fall time), the lower the crosstalk. Also due to slow transition lines changing reflections occur during the rise time of signal and therefore a termination resistance is not necessary.

Figure 20.

Figure 21.

From transmission line theory we know that when the time it takes for the signal to go from one end of the line to another), then all reflections lines appear during the rise/fall of the signal, and therefore, no terminal impedance (termination resistance) is not needed. Bits per second (bits/s, or bps) which can be transferred without deformation depends on several factors, one of them is the transition rate change.

The higher the growth rate the greater the number of bits per second. For example, if a signal has per transition rate change 30V/ms (30 volts per millisecond), and +15V used to represent the voltage of logic 0 (space), and -15V to represent the voltage of logic 1 (mark), then the signal would require 1 millisecond for the mark-space or space-mark transition, as shown in Figure 22a. Therefore, the minimum time required for a pulse, when the rate of change is transitional 30V/ms, is 2ms (Figure 22b).

Figure 22a, 22b.

Namely 1ms required to reach the voltage of +15V from the voltage of -15V (i.e., for the mark-space transition), and 1 ms to reach the voltage -15 volts by the voltage 15 volts (i.e. for the space-mark transition). Since the minimum length of this pulse is 2ms, the maximum data transmission rate (bits per second) is 500 bps. The actual data rate in a practical system will be much less, because of various other factors, which reduce considerably the actual data rate. A larger transition rate change will allow a greater transmission speed data communication system. For example, if the rate of change is now transitional 60V/ms, then the signal would require 0.5 seconds to park-space, or space-mark transition and thus the minimum time required to Van pulse is 1ms (0.5ms + 0.5ms = 1ms). The maximum data transfer rate in this case is 1000 bps.

If the maximum data rate of a system is greater than the maximum allowed value, then incorrect results can occur, since at these higher speeds bits, the signal will not have enough time to reach the voltage level, for example +15V or -15V. For example, assume that the rate of change is 30V/ms transition and the data rate (bits per second) of pulses we want to use in this system, is 5000. In this case the duration of each pulse is 0,0002sec, or 0,2ms (1sec/5000bps).

Figure 23. Equivalent circuit of a circuit RS-232.

Because the transition rate of change in this example is 30V/ms, ie the voltage increases or decreases at 30V in one second, then in 0,1ms the voltage increases or decreased by 3V. Therefore, if the voltage represents the bit 0 (space) is 15V and the next pulse is bit 1 (mark), then during the pulse (0.1 ms), the signal will change only by 3V, namely +15V in +12V. But the +12V represents the bit 0. It is obvious that in this case we need to reduce the rate of change transition, otherwise false results will be displayed in the system. The equivalent of a RS-232 circuit shown in Figure 23.


In asynchronous data, the parity may be used to detect errors. With the method of error detection rate, each transmitted character has a parity bit. Two ways parity check can be used, redundant parity (odd parity) or even parity (even parity). By detecting errors even parity, the parity bit is set to logic 1, if the number of bits of data, data being transferred and that is logical 1, is an even number, and the parity bits is a logic 0, if the number of bits is even. For example, the letter W is represented by the character ASCII 1010111.
This character has five data bits at logic 1. Since the number five is odd, if the system uses redundant parity, the parity bit should be set to logic 0, so that the total number of bits in logical 1 remains redundant. If the control system uses even parity, the parity bit in the above example is a logical 1, so that the total number of bits (i.e., the data bits and the parity bit) is an even number (ie 6, even number). The parity check is a very simple method, which is used to detect whether an error has been made in one bit, but it can cause incorrect results when there are many bit errors in a word.

For example, if the system uses even parity for data bits 1001011, and two of the bit was logic 0, changed to logic 1 (e.g., 1111011) during the transmission, then the total number of bits to logic 1 is still robust (6 bits to logic 1), and the circuit rate control system can not detect this error, since the number of bits to logic 1 remains even.


Figure 1. Asynchronous serial data transmission uses positive logic with redundant parity.

Figure 2. Two data groups of 7 bits, with two bits interruption rate.

An asynchronous transmission of any nature transmitted data is encoded in a series of pulses. The most common digital code used for the representation of the string (alphanumeric) character code is ASCII (American Standard Code for Information Interchange). ASCII code in a group of 7 or 8 bits used to represent one character. With seven bits can have 128 (2^7 = 128) combinations, and thus 128 different symbols can be represented. The ASCII code is used to represent letters, numbers, control codes like STX (start of text), the ACK (acknowledge), NIS (negative acknowledgment, negative acknowledgement), XON, XOFF, as well as several other symbols. Each letter, number, or symbol is represented by a unique series of bits.

For example, the capital letter A is represented by the bit sequence 1000001, the letter b by 1000010, the number 0 of 10110000, the number 1 of 0110001, and the like. If any information is not transferred, the line carrying the data signal or information is in a state of inactivity. In idle state the trend line that carries data takes the value of the binary bit 1 (or mark).

The binary 1 (mark) is represented by a positive voltage to a positive logic system, and a negative voltage to a negative logic system. In asynchronous character (letter, number, etc.) transmitted begins with the start bit (start bit) (pulse start). The start bit is represented by the binary bits 0 (space). When the transmitter sends a bit of a new character, the tension in the line gets the value of bits of (i.e., space). Because prior to transmission of bits, the line is idle (that is, the mark), the signal line changes from the condition mark in the state space. The transition from state to state space mark indicates to the receiver that a character UART data (7 data bits) will follow. The bits representing the character following one after the other (serial transmission). The first data bit is the least significant bit (LSB). If the asynchronous transmission uses parity, the parity bit follows after the data bits. Figure 1 illustrates an asynchronous serial data transmission that uses positive logic with redundant parity. When all the bits (including the parity bit) sent, the signal line back to the mark state and remains in this state for at least a period of one and a half, or two bits.

These bits are called stop bit (stop bit), and their presence ensures that the next transition mark-space will be recognized by the receiving device as the beginning of a new character. Note that after the interruption bit (stop bit) line remains in state mark (binary 1) to transmit the bits of (space) of the next character.

Notice that the bit is always shown off a mark. Figure 2 illustrates the transmission of two groups 7 data bits, with two bits and redundant switching rate.

Figure 3. To achieve better results, the receiver should do the sampling of data bits in the middle of each bit.


In asynchronous serial transmission ar used two seperate clocks for synchronization. One to the receiver and one in the transmitter. The clock is synchronized to the receiver each time the receiver detects the start of a character (i.e. a transition mark-space), compensating in this way any small frequency deviation between the two clocks. Once the receiver detect a mark-space transition sets (synchronizes) its clock and starts to sample the data line.

Figure 4. Serial transmission.

To make sure that the mark-space transition is not due to noise (voltage spike) voltage, the transmitter repeats sampling to the data line after the time period equal to half the bit duration (T/2). If the voltage level of the signal in the data row has changed in state mark, then the receiver assumes that this has occurred due to a short pulse noise, and therefore, this situation does not represent a real start bit. If on the other hand, the line is still in state space, the receiver assumes that a valid entry bit is detected and continues to scan the data line every T seconds.

To achieve best results the receiver must make the sampling of data bits in the middle of each bit as shown in Figure 3. When the next bit is detected, the receiver clock is reset and the sampling procedure repeated.

Synchronizing the clock receiver with each starting bit, we equalize any small deviation frequency that can exist between two clocks. To detect the correct values of the bits of a character, the clock of the receiver shall not deviate by more than one pulse width bits during the transmission of the whole character.

To determine the correct values of the data bits, the parity bit, and stop bit, the receiver and transmitter must have the same clock frequency, the same number of data bits, the same rate and the same number of off-bits. A disadvantage of the asynchronous transmission mode is the additional time required for the transmission of start and stop bits. An asynchronous transmission with 1 start bit, 8 data bits, and one stop bit, is only 80 percent efficient, because of the ten bits to be sent for each character, only 8 bits contain the information (data), and 2 bits are used for synchronization purposes.

The number of data bits per character in an asynchronous transmission can be 5, 6, 7, or 8, except the bits start, stop, and parity. Until now we have assumed that the digit 1 (mark) is represented by a positive voltage. For example, in positive logic TTL, the digit 1 (mark) is represented by a positive voltage (e.g. +5V), and the digit 0 (space) is represented by 0V. But, the standard RS-232, for transmitting the data, the numeral 1 (mark) is represented by a negative voltage, and the digit 0 (space) is represented by a positive voltage. The bits of a character in the RS-232 standard is a bit 0 (space), but in this case the bit 0 (space) is represented by a positive voltage. The stop bit is a digit 1 (mark), but represented by a negative voltage (Figure 4).


In synchronous mode when we transmit a group of characters, the characters do not start and stop bits, and data bits are transferred one after another. Namely, the first bit of a character immediately following the last bit of the previous character.
Because in synchronous operation there aren't any start and stop bits, each transmission of a group of characters begins with one or more special characters synchronization (SYNC), then follow the data and at the end of the group of data placed special characters to denote the end of data transmission. The characters have the same sync number of bits per character as the characters of data sent. Characters synchronization is not necessary to repeat any character data, and the data group usually consists of hundreds or even thousands of bits.

Figure 5. Serial transmission format.

This mode of transmission is more efficient than the asynchronous mode. Figure 5 illustrates the format of one block, consisting of the group of data, characters synchronization (SYNC) and the end of transmission character (EOT, End of Transmission), which indicates the end of the data block. To format shown in Figure 5 is not only used in a synchronous transmission but illustrates the general features. When the reciever detects the character or characters synchronization (eg, a predetermined number of bits) synchronizes its clock to that of the transmitter, and assumes that the next characters after the character sync are data characters. Because the characters are transmitted without start and stop bits, must use a common clock of the transmitter and the receiver. Whether the clock of the receiver or the transmitter clock may be used for synchronization. The sync signal allows the receiver to recognize the bit data, arriving at the receiver until the receiver detects the end of transmission character (EOT).