8051 Development System Circuit Board 4

There are important considerations when using additional memory, but it is certainly feasible. The MP3 player project utilizes 32 megabytes of memory. However, using more memory necessitates careful planning. The key factor is that the 8051 processor has a 16-bit address space, which restricts the processor to a maximum of 64k of memory. The 8051 architecture comprises three memory spaces: 256 bytes of internal RAM and two external spaces of 64k bytes each, designated for data and executable code. The executable code space is read-only (controlled by the PSEN signal), leaving only one writable 64k address space available. This design incorporates an AND gate (74AC08) to combine the two external spaces, simplifying board usage and enabling memory writing during code downloads. Ultimately, there is a total of 64k addressable space. A common method for expanding memory is to connect it as described, linking higher address bits (A16, A17, etc.) to port pins. This technique, known as "bank swapping," effectively creates multiple banks of memory, with only one bank being accessible to the processor at any given time. The banks can be swapped by altering the port pins connected to the upper address bits. In the provided schematic, the 39F512 flash ROM contains 64k of memory, although only 30k is user-accessible (due to chip select logic not asserting CE, pin 22, which allows the LCD, 82C55, and chip select signals to utilize the upper 2k of the memory map). A straightforward method to utilize 60k of flash memory involves disconnecting A15 (pin 3) from +5V and connecting it to a port pin. Alternatively, a 39F040 chip could replace the 39F512, allowing A16, A17, and A18 to connect to additional port pins, thereby providing sixteen banks of 30k or a total of 480k of flash memory. A similar strategy can be applied to RAM chips, with options for 128k and 512k RAM chips. These larger RAM chips feature 32 pins instead of 28, but their 28 common pins serve similar functions, requiring only a few additional connections. Connecting upper address bits to port pins enables bank swapping for these RAM chips. Bank-swapped memory is particularly suitable for data storage applications, such as data logging, where sensor data is collected and stored in flash ROM for later retrieval by a PC. The MP3 player utilizes megabytes of RAM to store MP3 bitstreams read from the hard drive, awaiting playback by the decoder chip. However, bank-swapped memory is not ideal for regular program variables. When the SDCC C compiler allocates a variable in the RAM chip (using the xdata keyword, which is the default in the large memory model option), it does not account for bank swapping. Consequently, if the port pin changes and the compiler attempts to access a variable in the RAM chip, it may retrieve incorrect information. Writing an application entirely in assembly language to ensure proper access to bank-swapped variables is feasible but challenging. A similar issue arises when flash ROM is used for both executable code and data logging; while the data logging section can be bank swapped, the executable code must remain unchanged during execution to prevent program crashes. Creative solutions exist to address these challenges, but generally, it is advisable to avoid bank swapping for program code and typical program variables. A more advanced bank-swapping strategy may be necessary, where a segment of the address space remains constant while the remainder is bank swapped. For instance, a 74HC08 AND gate chip could be employed between the port pins and the upper address bits (A15, A16, A17, A18) of a 39F040 chip.

The design of the MP3 player project showcases the complexity involved in memory management when utilizing the 8051 processor. The architecture's limitation of a 16-bit address space necessitates careful planning to ensure efficient use of available memory. The implementation of bank swapping allows for the effective expansion of memory, enabling the system to handle larger datasets, particularly in applications such as data logging and audio streaming.

The use of an AND gate (74AC08) to combine memory spaces simplifies the design, facilitating easier integration and management of memory resources. By employing techniques such as connecting higher address bits to port pins, the design achieves a flexible memory architecture that can adapt to various requirements. The transition from the 39F512 to the 39F040 flash ROM further enhances memory capacity, providing options for extensive data storage through the utilization of multiple banks.

However, the challenges associated with bank-swapped memory highlight the need for careful coding practices, especially in relation to variable allocation and access. The potential for incorrect data retrieval underscores the importance of understanding the nuances of memory management within the context of the 8051 architecture. Overall, the project illustrates the balance between expanding memory capabilities and maintaining system stability, a crucial consideration in embedded system design.There are some important considerations to using more memory, but it certainly is possible. the mp3 player project uses 32 megabytes! But using more memory requires careful consideration. The most important factor is that the 8051 processor has a 16 bit address space. This means the processor can never "see" more than 64k of memory. Actually, the 8051 has three memory spaces, 256 bytes of internal RAM, and two 64k byte external spaces, one for data and the other for executable code. The executable code space is read-only (PSEN signal), so there is really only one writable 64k address space. This design uses an AND gate (74AC08) to combines the two spaces together, which makes the board simpler to use and of course is needed to allow writing to the memory during code download.

So in the end, there is really only a 64k address space to use. A common approach to using more memory is to connect the memory as shown above, and then to connect the higher address bits (A16, A17, etc) to port pins. This is called "bank swapping", because it effectively provides multiple banks of memory and only one is "visible" to the processor at any one time.

The banks are "swapped" by changing the port pins that connect to the upper address bits. In the schematic above, the 39F512 flash rom is actually 64k of memory, but only 30k is available to the user (the chip select logic does not assert CE, pin 22, so that the LCD, 82C55 and chip select signals can use the upper 2k of the memory map). A simple approach to using 60k of flash memory would be to disconnect A15 (pin 3) from +5V and attach it to one of the port pins.

Likewise, a 39F040 chip could be substituted for the 39F512, and then A16, A17, and A18 could be attached to additional port pins to provide sixteen banks of 30k or a total of 480k of flash memory. A similar approach could be used with the RAM chip, as there are 128k and 512k RAM chips. These larger RAM chips have 32 pins instead of 28 pins, but their 28 common pins have similar functions, so only a few extra pins need to be connected.

Again, connecting upper address bits to the port pins would allow the memory to be "bank swapped". Bank swapped memory is most suitable for storing data, such as a data logging application where sensors are read and their data is collected and stored into the flash rom, and later read out when the user collects it to their PC. The MP3 player uses megabytes of RAM to hold MP3 bitstreams that have been read from the hard drive and are waiting to be played by the decoder chip.

Bank swapped memory is not suitable for normal program variables. When the SDCC C compiler allocates a variable in the RAM chip (xdata keyword, which is the default type if you use the large memory model option), the compiler does not "know" about bank swapping. If you change that port pin and the compiler attempts to access any variable in the RAM chip, it will access incorrect information.

It is possible to write an application entirely in assembly that makes only proper accesses to bank swapped variables, but it is difficult to write this sort of code. A similar problem occurs when the flash rom is used for both executable code and data logging. The data logging portion can be bank swapped, but the code portion must not change because any change while code is executing would cause the program to crash.

There are some creative approaches to write code to deal with these issues, but usually the best approach is to avoid bank swapping for program code and especially for normal program variables. Often a more sophisticated approach to bank swapping is needed, where a portion of the address space is always the same, and the rest is bank swapped.

For example, a 74HC08 AND gate chip could be used between those port pins and the upper address bits (A15, A16, A17, A18) of a 39F040 chip. 🔗 External reference