8051 Selling Leads

Posted on Feb 5, 2014

This circuit shows a DS1236 that is used to monitor and control the power-supply and software execution of a processor-based system, and to provide a pushbutton reset. When an out-of-tolerance condition occurs (when VCC is below 4. 5 V for 10% operation, or below 4. 75 V for 5% operation), the RST and RST outputs are driven to the active state. On p

8051 Selling Leads
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ower-up, RST and RST are held active for a minimum of 25 ms (100 ms typical) after 4. 5 V (or 4. 75 V) is reached to allow the power supply and processor to stabilize. The pushbutton input PBRST is debounced and timed so that reset signals are driven to the active state for 25 ms minimum. The watchdog-timer function forces RST and RST to the active state (shutting down the processor) when the ST input is not stimulated for a predetermined time period (because of some failure in software execution). The watchdog time period is 400-ms typical (600-ms maximum). The ST input can be taken from address, data, and/or control signals. When the processing is executing software, these signals are present, and cause the watchdog to be reset prior to time-out. Dallas Semiconductors, Product Data Book, 1992/1993, p. 10-73.

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