A front-end circuit has been developed for the D0 upgrade for reading out visible light photon counters (VLPC`s) associated with the fiber tracker and the preshower detectors. This custom chip, called SIFT, will be used to collect low-level charge signals from the VLPC`s, provide discriminated signals to the L1 trigger system and inject regenerate
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d charge signals into an SVX-II based readout system. The chip R&D is now complete. In this note we present all the measurements that are relevant to the operations of the SIFT. The SIFT chip was initially designed as a trigger "pick-off" chip for the fiber tracker. Hence, the design parameters reflect the requirements of response to minimum ionizing particles (MIP`s) traversing scintillating fibers. The preshower detectors, however, have vastly different signal properties. We have developed a charge division technique in order to increase the effective dynamic range and resolution of the SIFT and adapt it for reading out the preshower detectors. These studies will be reported in another note. The SIFT chip consists of 20 identical channels, of which 18 will be active and 2 are intended to be guard channels. Figure 1 shows a functional overview of one channel of the SIFT chip. The front-end is an inverting charged sensitive preamplifier with a switched capacitor Cfb (185 fF) in the feedback loop. The output of the preamp is fed into a buffer source follower that drives ac-coupled discriminator and charge driver circuits. The function of the charge driver circuit is somewhat complicated because it has to regenerate a charge impulse and feed it to the SVX in a dc-coupled mode. Hence, the dc bias level of the input of the SVX chip has to be offset by the SIFT. The problem becomes more challenging because there is a 20-30 mV...
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