FET relay circuit 2
Description: FET relay circuit 2 is essentially a JS-20 time relay circuit. When the switch SA is open, the relay device KA remains in the released state. Once switch SA is closed, the delay period begins. After a specified duration, the thyristor activates, causing relay KA to engage. The adjustment potentiometer RP allows for modification of the delay time.
The FET relay circuit, designated as the JS-20 time relay, operates by utilizing a field-effect transistor (FET) as a control element to manage the timing function of the relay. The circuit is designed to maintain the relay in a deactivated state when the switch SA is open. This is achieved by ensuring that no current flows through the relay coil, thereby keeping the relay device KA in its released state.
Upon closing switch SA, the circuit initiates a delay sequence. During this delay, the capacitor in the timing circuit begins to charge through a resistor, forming an RC time constant that determines the duration of the delay. The time taken for the capacitor to charge to a specific voltage level is what ultimately dictates when the thyristor will be triggered.
Once the capacitor reaches the required voltage, the thyristor is activated, allowing current to flow through the relay coil. This activation pulls in relay KA, switching the connected load on. The delay time can be adjusted by varying the resistance of potentiometer RP, which alters the RC time constant. By increasing the resistance, the time delay increases, while decreasing it shortens the delay.
The circuit may also include additional components such as diodes for flyback protection to prevent voltage spikes when the relay coil is de-energized. Overall, this FET relay circuit provides a reliable and adjustable timing mechanism suitable for various applications where controlled delay activation is necessary.FET relay circuit 2 It is actually a JS-20 time relay circuit. SA before the switch is closed, the relay device KA tends to release state. After SA closed circuit delay start, after a period of time, the thyristor is turned on, KA pull. Adjustment potentiometer RP, can change the delay time.
The FET relay circuit, designated as the JS-20 time relay, operates by utilizing a field-effect transistor (FET) as a control element to manage the timing function of the relay. The circuit is designed to maintain the relay in a deactivated state when the switch SA is open. This is achieved by ensuring that no current flows through the relay coil, thereby keeping the relay device KA in its released state.
Upon closing switch SA, the circuit initiates a delay sequence. During this delay, the capacitor in the timing circuit begins to charge through a resistor, forming an RC time constant that determines the duration of the delay. The time taken for the capacitor to charge to a specific voltage level is what ultimately dictates when the thyristor will be triggered.
Once the capacitor reaches the required voltage, the thyristor is activated, allowing current to flow through the relay coil. This activation pulls in relay KA, switching the connected load on. The delay time can be adjusted by varying the resistance of potentiometer RP, which alters the RC time constant. By increasing the resistance, the time delay increases, while decreasing it shortens the delay.
The circuit may also include additional components such as diodes for flyback protection to prevent voltage spikes when the relay coil is de-energized. Overall, this FET relay circuit provides a reliable and adjustable timing mechanism suitable for various applications where controlled delay activation is necessary.FET relay circuit 2 It is actually a JS-20 time relay circuit. SA before the switch is closed, the relay device KA tends to release state. After SA closed circuit delay start, after a period of time, the thyristor is turned on, KA pull. Adjustment potentiometer RP, can change the delay time.
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