4013
4013 Dual D-Type Flip-Flop Technical Summary
Overview
The 4013 is a monolithic integrated circuit containing two independent D-type flip-flops with set and reset capabilities. Part of the CD4000 series CMOS logic family, it is designed for medium-speed operation while maintaining low power consumption. The device is available in HCC (extended temperature range) and HCF (intermediate temperature range) variants, packaged in a standard 14-lead configuration. The 4013 meets all requirements of JEDEC Tentative Standard No. 13A, ensuring compatibility and reliability across applications.
Features
- Set-Reset Capability: Independent control inputs for setting or resetting each flip-flop
- Static Operation: Maintains state indefinitely with clock level either high or low
- Medium-Speed Performance: 16MHz typical clock toggle rate at 10V supply
- Low Power Consumption: Quiescent current specified up to 20V for HCC devices
- Standardized Outputs: Symmetrical output characteristics for consistent performance
- Wide Voltage Range: Parametric ratings at 5V, 10V, and 15V operation
- High Input Impedance: Input current of only 100nA at 18V and 25°C for HCC devices
- Rigorous Testing: 100% tested for quiescent current to ensure quality
- Temperature Variants: Available in extended (HCC) and intermediate (HCF) temperature ranges
Applications
The 4013's versatile characteristics make it suitable for numerous digital applications:
- Data Storage: Used in registers and temporary data storage circuits
- Frequency Division: Can be configured as divide-by-two counters
- Debouncing Circuits: Effective for switch debouncing applications
- Control Logic: State machines and sequential logic implementations
- Clock Synchronization: Data synchronization in digital systems
- Pulse Shaping: Signal conditioning and pulse width modification
- Memory Elements: Basic building block for more complex memory systems
Electrical Characteristics
Absolute Maximum Ratings
- Supply Voltage (VDD): -0.5V to +20V
- Input Voltage (VIN): -0.5V to VDD + 0.5V
- Storage Temperature Range: -65°C to +150°C
- Power Dissipation: 200mW (per package)
Recommended Operating Conditions
- Supply Voltage Range: 3V to 18V
- Input Voltage Range: 0V to VDD
- Operating Temperature Range:
- HCC Version: -55°C to +125°C
- HCF Version: -40°C to +85°C
DC Characteristics (VDD = 10V, TA = 25°C unless otherwise specified)
- High-Level Input Voltage (VIH): 7V min (VDD = 10V)
- Low-Level Input Voltage (VIL): 3V max (VDD = 10V)
- High-Level Output Voltage (VOH): 9.95V min (IO = -0.4mA)
- Low-Level Output Voltage (VOL): 0.05V max (IO = 0.4mA)
- Input Current (IIN): ±100nA max at 18V
- Quiescent Current (IDD): 1μA max at 20V
AC Characteristics (VDD = 10V, TA = 25°C unless otherwise specified)
- Maximum Clock Frequency (fCLK): 16MHz typical
- Propagation Delay (CL to Q): 120ns typical
- Set/Reset Pulse Width (tW): 100ns min
- Setup Time (D to CL): 60ns min
- Hold Time (D after CL): 0ns min
Package Information
The 4013 is available in several standard 14-lead package options:
Plastic Dual-In-Line Package (PDIP)
- Package Code: D (JEDEC MS-001)
- Body Dimensions: 19.3mm x 6.35mm
- Lead Pitch: 2.54mm
- Lead Count: 14
Small Outline Package (SOIC)
- Package Code: M (JEDEC MS-012)
- Body Dimensions: 8.65mm x 3.9mm
- Lead Pitch: 1.27mm
- Lead Count: 14
TSSOP (Thin Shrink Small Outline Package)
- Package Code: PW (JEDEC MO-153)
- Body Dimensions: 5mm x 4.4mm
- Lead Pitch: 0.65mm
- Lead Count: 14
Functional Description
The 4013 contains two independent D-type flip-flops with asynchronous set and reset inputs. Each flip-flop features:
- Data Input (D): Determines the next state when clocked
- Clock Input (CLK): Positive-edge triggered transition
- Set Input (S): Active high, overrides clock and data inputs
- Reset Input (R): Active high, overrides clock and data inputs
- Outputs (Q and Q̅): Complementary outputs representing the stored state
The truth table for each flip-flop is as follows:
