2173

ADSP-2173: High-Performance Digital Signal Processor

Overview

The ADSP-2173 is a single-chip microcomputer optimized for digital signal processing (DSP) and high-speed numeric processing applications. Designed for 3.3V operation, it is part of the ADSP-217x family, which includes the ADSP-2171 (5.0V) and ADSP-2172 (5.0V with 8K words of program ROM). The ADSP-2173 leverages the ADSP-2100 base architecture while introducing enhancements for improved performance and power efficiency.

This DSP processor features a powerful computational engine with independent arithmetic units, dual data address generators, and efficient program sequencing. Its low-power design makes it suitable for portable and battery-powered applications requiring high-speed signal processing.

Key Features

• High Performance: 50ns instruction cycle time (20 MIPS) from 10MHz crystal at 3.3V
• Memory Configuration:
  • 2K words (24-bit) of on-chip program memory RAM
  • 2K words (24-bit) of on-chip data memory RAM
• Computational Units:
  • Independent ALU, multiplier/accumulator (MAC), and barrel shifter
  • Single-cycle instruction execution
  • Multifunction instructions
• Power Management:
  • 70mW typical power dissipation at 3.3V
  • Powerdown mode with less than 0.36mW standby power
  • 100 cycle recovery from powerdown
• I/O Capabilities:
  • 8- or 16-bit parallel host interface port
  • Two double-buffered serial ports with companding hardware
  • Programmable 16-bit interval timer with prescaler
• Development Support: Fully supported by ADSP-2100 Family Development Software

Applications

The ADSP-2173 is suitable for a wide range of digital signal processing applications, including:

• Audio processing and speech recognition systems
• Telecommunications equipment (modems, cellular base stations)
• Medical instrumentation and imaging systems
• Industrial control and automation
• Military and aerospace signal processing
• Consumer electronics (digital audio, video processing)
• Automotive signal processing applications

Electrical Characteristics

Absolute Maximum Ratings

• Supply Voltage (VDD): -0.3V to +4.6V
• Input Voltage: -0.3V to VDD + 0.3V
• Operating Temperature Range: -40°C to +85°C
• Storage Temperature Range: -65°C to +150°C

Recommended Operating Conditions

• Supply Voltage (VDD): 3.0V to 3.6V
• Operating Temperature: -40°C to +85°C
• Input High Voltage (VIH): 2.0V to VDD
• Input Low Voltage (VIL): 0V to 0.8V

Power Consumption

• Active Mode: 70mW typical at 3.3V, 10MHz
• Standby Mode: <0.36mW
• Powerdown Recovery: 100 cycles

Timing Characteristics

• Instruction Cycle Time: 50ns (20 MIPS)
• Serial Port Clock Rate: Up to 10MHz
• Host Interface Access Time: 100ns maximum

Package Information

The ADSP-2173 is available in the following package options:

• 128-Lead Thin Quad Flat Pack (TQFP):
  • Package Dimensions: 14mm × 14mm body
  • Lead Pitch: 0.4mm
  • Lead Count: 128
• 128-Lead Plastic Quad Flat Pack (PQFP):
  • Package Dimensions: 28mm × 28mm body
  • Lead Pitch: 0.65mm
  • Lead Count: 128

Development Support

The ADSP-2173 is supported by the comprehensive ADSP-2100 Family Development Software, which includes:

• System Builder: High-level system architecture definition
• Assembler: Algebraic syntax for easy programming and debugging
• Linker: Combines object files into executable files
• Simulator: Interactive instruction-level simulation
• PROM Splitter: Generates PROM programmer compatible files
• C Compiler: Based on GNU C Compiler, generates ADSP-217x assembly code
• Runtime Library: Includes over 100 ANSI-standard functions

Architectural Details

The ADSP-2173 features a modified Harvard architecture with separate program and data memory buses for simultaneous instruction and data access. Key architectural components include:

• Arithmetic Units:
  • Multiplier/Accumulator (MAC) for single-cycle multiply-accumulate operations
  • Arithmetic Logic Unit (ALU) for general-purpose arithmetic and logical operations
  • Barrel Shifter for efficient data manipulation
• Memory Architecture:
  • Dual-purpose program memory for both instructions and data storage
  • Efficient data address generators (DAGs) for circular buffering
• Program Sequencer: Provides zero-overhead looping and conditional instruction execution
• I/O Subsystem:
  • Two double-buffered serial ports with companding hardware
  • Flexible host interface port (8- or 16-bit parallel)
  • Programmable timer for system timing functions

Conclusion

The ADSP-2173 represents a powerful, low-power solution for demanding digital signal processing applications. Its combination of high performance, efficient architecture, and comprehensive development support makes it an excellent choice for designers working in audio processing, telecommunications, and other signal-intensive applications. The 3.3V operation and advanced power management features make it particularly suitable for portable and battery-powered devices where power efficiency is critical.