Low-Jitter Clock for High-Speed Data Converters


Posted on Apr 1, 2013

Figure 1 illustrates the simplified block diagram of a typical high-speed data converter system. The system consists of a bandpass filter, ADC, high-frequency clock, high-speed storage device, and post processing unit. Aside from the MAX104, the high-frequency clock plays a significant role in determining the accuracy of a high-speed data converter. This high frequency, low-phase-noise clock is a combination of a high frequency voltage-controlled oscillator (U1), a phase-locked loop (U2), and a crystal oscillator (U3) as shown in Figure 2.



Many modern, high-speed, high-performance integrated circuits, such as the MAX104 and MAX106 analog-to-digital converters (ADCs), require a low-phase-noise (low-jitter) clock that operates in the GHz range. Conventional crystal oscillators may provide a l




Leave Comment

characters left:

New Circuits

.

 


Popular Circuits

Lamp Timer
60W Power Amplifier with 2N3055
Night Security LightCircuit
microcontroller Digital bargraph display driver circuit
2 km FM transmitter
Analogue Inputs to MIDI Out
Barn Door motor driven Mounts
FM24C256 interface circuit



Top